BenQ PE8700 service manual Procedure Black Level Adjustment DLP brightness

Page 32

Procedure:

A. Black Level Adjustment: (DLP brightness)

1.

Change pattern of pattern generator :

 

 

 

 

Pattern : Black (Gray 0)

2.

Adjust DLP Brightness to let the black picture to just distinguish.

B. White Level Adjustment: (AD contrast---R,G,B gain)

1.Change pattern of pattern generator : pattern : White (100% Gray)

2.Use Lux meter to measure the white level. Adjust the contrast value of AD9883 (RGB) to let the light output to just max.

3.Change to 32-gray (0 ~ 100%) pattern. All steps must appear,

C. Offset adjustment at low brightness (AD R, G, B offset)

1.Change Timing and pattern of pattern generator : pattern : 10% Gray

2.Set user color temp to 6500K.

3.Adjust AD9883 Red and Blue Offset to meet 6500K color spec.

D. Color Temperature at high brightness (Scalar Gamma R, G, B Gain)

1. Change Timing and pattern of pattern generator :

Timing : 800x600@60Hz (H:37.879Khz,V:60.317Hz) Pattern : 80% gray

2 Color temperature spec: CIE 1976 u’, v’ chromaticity)

Color temperature

5400°K

6500°K

7500°K

x =

 

 

 

 

27u'

0.333

0.312

0.296

18u' − 48v' + 36

 

 

 

 

 

y =

 

 

 

12v'

0.333

0.329

0.316

 

 

 

 

 

 

 

18u' − 48v' + 36

 

 

 

u ' =

 

 

4x

 

0.210

0.197

0.190

 

− 2x + 12 y + 3

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

v ' =

 

 

9 y

 

0.473

0.468

0.459

 

− 2x + 12 y + 3

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Deviation:

<=0.010

<=0.010

<=0.010

u’v’=

( ∆u' 2 + ∆v' 2

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Color Temp 4 = color temp is the same as that of 6500K

31

Image 32
Contents DLP Projector Contents Safety Precautions Servicing PrecautionsEngineering Specification MinimumPage Hdtv IEC Vcci General requirements ContentAppendix a Optical Measurement Practical consideration A1. BrightnessA2. Brightness Uniformity A5. Peak Contrast A9. Zoom Ratio Test Summary Appendix B Design Verification Test ProcedurePurpose Definition Test OrderAppendix C Drawings and Attachments Page Appendix D HD2 Front Projection Image Quality Specification Gray 6 test screen Gray 10 test screenWhite test screen Black test screen· Refer to for acceptance criteria, in specified order Red Ramp test screenTest Conditions as tested in OEM projector Image Quality Specification Support Timings by DVI-I Input Analog or Digital PC signals Appendix E Supporting TimingsPage Spare Parts List Projector PE8700 99.J5877.B21Black Diagram BNCPackaging Description Appearance Description Page Alignment Procedure Procedure OSD Default value used for color delay alignment EquipmentSelect Save Setting at Factory OSDFactory OSD Default value used for DVI-Analog color alignment Offset adjustment at low brightness AD R, G, B offset Procedure Black Level Adjustment DLP brightnessWhite Level Adjustment AD contrast---R,G,B gain YPbPr Component Equipment User setupwhite C15400k C26500k C37500kOSD Default value used for Ypbpr color alignment Procedure Pbpr Offset adjustment AD PB, PR Offset Gray Level AD Ypbpr Contrast, BrightnessSaturation Level Scalar Case x1x0 & y1 y0 User setupwhite C15700k C26500k C39300k Factory SDGray Level for Ycbcr Component Procedure Saturation LevelOSD Default value Value USERPicture Procedure Gray LevelGray Level for Composite Video & S-Video Equipment Additional Patterns used for color final checkTrouble Shooting Guide System trouble shootingMain board trouble shooting YESSIL504 trouble shooting U4, U2 CPU U10 trouble shooting guide DMD board trouble shooting guide YESConnector board trouble shooting guide OK?Power board trouble shooting guide 鐐 衒 蘠 耟  鞤 矏 矏 耟 礼袨 蘠 醥 袓 藜 耟  韗 齇 耟  斉 鞥 觖 罿 蘠 韘 篧 蚴 礼  誜 袨 鷘 矏 篧 袨 ゾ 篧 礼 榢 譗 む 鞥 觖蛂 豽 袕 む 醥 藜 罿袨 矏 篧 ソ 譂 Factory OSD Operation FactoryHD Adj STD AdjColor Balance Filter Bypass DLP Pattern1Pattern2 Pattern3Test Mode Firmware Upgrade Procedure Page 12. RS232 Codes Page X00 Must be Reversed , no function X57 Picture by picture display Page Following is the list of Y-group Page ACK = Y1Y Page Page Page Dvdoreset Deintdone McuresetOpenable Mcureset TriggerBenq Corporation DIIN8 DIIN9 DIIN6DIIN7 DIIN4Resetdvdo InterlacedetectCLK54 22DETECT 32DETECTBenq Corporation RM1OP Enable RM1CLKIN WIRETP31MEMDQ14 WIRETP30 CP UD0 CP UD1Resetn SDA SCL Resetvcc PowerontestResetvcc CPUA8 CP UD0 CPUS2 Resetn CPUA3 CpurdnWIRETP53 WIRETP52 INLTCH25WIRETP51 INLTCH26 WIRETP46 INLTCH27This PIN only for Test MEMDQ31 MEMDQ0 MEMDQ15 MEMDQ48MEMDQ30 MEMDQ1 MEMDQ14 MEMDQ49Cwindex Circuit FLADDR12 FLADDR16U2C CTM1M CTMN1MScrew Holes P2P5VINDDAN10 DDAN11 DDAN12 DDAN13 DDAN14 DDAN15 ScrlrDAD1000 SSI Color Wheel Drive Circuit Benq Corporation 500 OHM Vsync 1CAPP+ CappCAP HSB BnchsVoltage level of CB/CR is ADR0 Datack HsoutSogout Vsout AdrinReset ScinCR1IN CB 1IN Sogy Sogyin Sogrca Racin Inta1TURN on Larry Lin1 Hsdjtr R101 Resetzdvi Resetzdvi RES Oclk INVRESETR111 Dviscl DVISCL3V Dvisda DVISDA3V
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