Quatech user manual QSC-100 Revision March

Page 32

QSC-100

User's Manual

Revision 1.11

March 2004

P/N: 940-0146-111

Quatech QSC-100 User's Manual

30

Image 32

Contents QSC-100 Warranty Information Declaration of Conformity Application of Council Directive Standards to which Conformity is DeclaredType of Equipment Equipment ClassQTPCI.EXE General Information Part Number IND Option FeaturesIND Option --- Surge Suppression Upgrade Enable Scratchpad Register SPAD, J6 Hardware ConfigurationFactory Default Configuration Force High-Speed Uart Clock X2, X4, or X8, J3-J5 Clock multiplier jumper optionsHardware Installation Jumper/connector locationsPort Address Range Address Map and Special RegistersBase Address and Interrupt Level IRQ Enabling the Special Registers Interrupt Status RegisterDlab Bit Spad Jumper Register selected for Bit DescriptionOptions Register Enhanced Serial Adapter IdentificationClock Rate Multiplier Bit Name DescriptionRR1 RR0 Clock Rate Uart Clock Maximum Data Multiplier FrequencyWindows Configuration Windows MillenniumWindows Page Windows Viewing Resources with Device Manager Windows NT Page DOS and Other Operating Systems QTPCI.EXEQTPCI.EXE Basic Mode display QTPCI.EXE Expert Mode display OS/2 External Connections RS-232 Port Signal QSC-100 connector pinoutsPCI Resource Map INTA#Specifications Page Cannot communicate with other equipment TroubleshootingComputer will not boot up QSC-100 Revision March

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