System BIOS Cacheable

When enabled, allows the ROM area FOOOH-FFFFH to be cacheable when the cache controller is activated. The recommended setting is "Disabled", especially for high speed CPUs (200 MHz and above).

Video BIOS Cacheable

When enabled, allows the system to use the video BIOS codes from SRAMs, instead of the slower DRAMs or ROMs.

The options are: Enabled (Default), Disabled.

Video RAM Cacheable

Enables video RAM to be cacheable.

The options are: Disabled (Default), Enabled.

16 Bit I/O Recovery Time

Sets 16-bit I/O signal recovery time.

The options are: 1 (Default), 2, 3, 4, N/A.

Memory Hole at 15M-16M

When enabled, the memory hole at the 15 MB address will be relocated to the 15 ~ 16 MB address range of the ISA cycle when the processor accesses the 15 ~ 16 MB address area.

The options are: Disabled (Default), Enabled.

Delayed Transaction

When disabled, the syatem operates normally. When enabled, the system can support lower-speed ISA devices.

The options are: Disabled (Default), Enabled.

Spread Spectrum

When disabled, the syatem operates normally. When enabled, the spread spectrum will be set to 0.5% (CNTR).

The options are: Disabled (Default), Enabled.

7 4 PPC-S123 User's Manual