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AMX 68000 Target Guide
3.4 Conforming ISPs
A conforming ISP consists of an ISP root and a device Interrupt Handler. The ISP root is
created in your Target Configuration Module by the AMX Configuration Generator using
the information provided in your Target Parameter File (see Chapter 4).
The address of the ISP root must be installed in the AMX Vector Table. You must
provide a Restart Procedure or task which calls AMX procedure cjksivtwr or cjksivtx
to install the ISP root pointer into the AMX Vector Table prior to enabling interrupt
generation by the device.
The ISP root is the actual Interrupt Service Procedure which is executed by the processor
when the interrupt occurs. The ISP root calls the AMX Interrupt Supervisor to indicate
that interrupt service has begun.
The ISP root then calls the device Interrupt Handler to dismiss the interrupt request and
service the device. Upon return from the Interrupt Handler, the ISP root informs the
Interrupt Supervisor that the interrupt service is complete. The Interrupt Supervisor
either resumes execution at the point of interruption or invokes the Task Scheduler to
suspend the interrupted task in preparation for a context switch. The path taken is
determined by the actions initiated by your Interrupt Handler.
Interrupt Handlers can be written as C procedures with or without a single 32-bit formal
parameter. The parameter, if needed, is identified in your definition of the ISP root in
your Target Parameter File (see Chapter 4.3).
Upon entry to your Interrupt Handler written in C, the following conditions exist:
Interrupts are enabled at priority n (0 to 6) where n is the priority at which
the interrupt occurred.
The stack pointer in register SP references the AMX Interrupt Stack.
The Interrupt Handler can also be written in assembly language. Use assembly language
if speed of execution is critical. Upon entry to an Interrupt Handler written in assembly
language, the following conditions exist:
Your Interrupt Handler parameter is in register D1.
The stack pointer in register SP references the AMX Interrupt Stack.
The return address is on the stack at (SP).
Registers D0, D1, A0 and A1 are free for use.
Condition code flags in the status register (SR) can be altered.
All other registers must be preserved.