Introduction
ARM DDI 0397G Copyright ©2006-2010 ARM. All rights reserved. 1-3
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1.2 Key features
The AMBA Network Interconnect is a highly configurable infrastructure component that
supports:
• 1-128 AXI or AHB-Lite slave interfaces.
• 1-64 master interfaces that can be AXI, AHB-Lite, APB2, or APB3.
• Configuration of:
— an APB port to support 1-16 slaves
— an AXI port to support four region control bits.
• Single-cycle arbitration.
• Full pipelining to prevent master stalls.
• Programmable control for FIFO transaction release.
• Multiple switch networks.
• Complex topologies, including Network On Chip (NOC) loop-back connections between
switches.
• Up to five cascaded switch networks between any master and slave interface pair.
• AXI or AHB-Lite masters and slaves with:
— an address width of 32-64 bits
— a data width of 32, 64, 128, or 256 bits.
• Non-contiguous APB slave address map for a single master interface.
• Independent widths of user-defined sideband signals for each channel.
•Global Programmers View (GPV) for the entire infrastructure that you can configure so
that any master, or a discrete configuration slave interface, can access it. See Chapter3
Programmers Model.
• Highly flexible timing closure options.