Introduction
ARM DDI 0397G Copyright ©2006-2010 ARM. All rights reserved. 1-6
ID031010 Non-Confidential
r1p2-r2p0 Contains the following differences in functionality:
• Network of interconnects instead of a single interconnect
• Optimized translation latency replaces additive translation latency
• Single cycle arbitration instead of arbitration switching delay
• Enhanced buffering to reduce stalls
• Multiple outstanding downsizer transactions instead of limited outstanding
downsizer transactions
• Upsizer packs data into the wide bus, instead of an expander, for data width
changes
• Global dynamic QoS instead of local static QoS
• Internally programmable instead of externally programmed
• System-level address map replaces an address map for each interconnect
• Extended timing closure options replace limited timing closure options
• 256-bit maximum data width instead of 128-bit maximum data width
• Multi-region slave support replaces a single region per slave
• Write FIFO, transaction release control instead of fixed write transaction
release point.
See AppendixA Revisions.
r2p0-r2p1 Contains no differences in functionality.