ARM NIC-301 2.2 Interfaces

Functional Description

ID031010 Non-Confidential

2.2 Interfaces

This section describes the AMBA Network Interconnect interfaces and contains the following

subsections:

•Slave interfaces

•Master interfaces on page 2-8.

2.2.1 Slave interfaces

The AMBA Network Interconnect supports the following slave interfaces:

•AXI slave interfaces

•AHB-Lite slave interfaces on page 2-4.

Note

Any transaction that does not decode to a legal master interface destination, or programmers

view register, receives a DECERR response. For an AHB master, the AXI DECERR is mapped

back to an AHB ERROR.

The AXI DECERR error is mapped back to an AHB master ERROR if:

• you do not configure the early write response

• you configure INCR Promotion and Early Write Response and the transaction is

non-cacheable

• the AHB burst is not broken.

AXI slave interfaces

An AXI slave interface supports the full AXI protocol.

Configuration options

You can configure the following properties:

• Address width of 32-64 bits.

• Data width of 32, 64, 128, or 256 bits.

• User sideband signal width of 0-32 bits.

• Data width upsize function, see Upsizing data width function on page 2-12.

• Data width downsize function, see Downsizing data width function on page 2-14.

• Frequency domain crossing of the following types:

—ASYNC

—SYNC 1:1

—SYNC 1:n

—SYNC n:1

—SYNC n:m.

• Security of the following types:

Secure All transactions originating from this slave interface are flagged as secure

transactions and can access both secure and non-secure components.