ARM NIC-301 Glossary

ID031010 Non-Confidential

Glossary

This glossary describes some of the terms used in technical documents from ARM.

Advanced eXtensible Interface (AXI)

A bus protocol that supports separate address/control and data phases, unaligned data transfers

using byte strobes, burst-based transactions with only start address issued, separate read and write

data channels to enable low-cost DMA, ability to issue multiple outstanding addresses, out-of-order

transaction completion, and easy addition of register stages to provide timing closure.

The AXI protocol also includes optional extensions to cover signaling for low-power operation.

AXI is targeted at high performance, high clock frequency system designs and includes a number

of features that make it very suitable for high speed sub-micron interconnect.

Advanced High-performance Bus (AHB)

A bus protocol with a fixed pipeline between address/control and data phases. It only supports a

subset of the functionality provided by the AMBA AXI protocol. The full AMBA AHB protocol

specification includes a number of features that are not commonly required for master and slave IP

developments and ARM recommends only a subset of the protocol is usually used. This subset is

defined as the AMBA AHB-Lite protocol.

See also Advanced Microcontroller Bus Architecture and AHB-Lite.

Advanced Microcontroller Bus Architecture (AMBA)

A family of protocol specifications that describe a strategy for the interconnect. AMBA is the ARM

open standard for on-chip buses. It is an on-chip bus specification that describes a strategy for the

interconnection and management of functional blocks that make up a System-on-Chip (SoC). It aids

in the development of embedded processors with one or more CPUs or signal processors and

multiple peripherals. AMBA complements a reusable design methodology by defining a common

backbone for SoC modules.