CY14B256K
Document Number: 001-06431 Rev. *H Page 26 of 28
Document History Page
Document Title: CY14B256K 256 Kbit (32K x 8) nvSRAM with Real Time Clock
Document Number: 001-06431
Rev. ECN Orig. of Change Submission
Date Description of Change
** 425138 TUP See ECN New data sheet
*A 437321 TUP See ECN Show data sheet on external Web
*B 471966 TUP See ECN Changed VIH(min) from 2.2V to 2.0V
Changed tRECALL from 60 μs to 100 μs
Changed Endurance from one million cycles to 500K cycles
Changed Data Retention from 100 years to 20 years
Added Soft Sequence Processing Time Waveform
Updated Part Numbering Nomenclature and Ordering Information
Added RTC Characteristics Table
Added RTC Recommended Component Configuration
*C 503277 PCI See ECN Changed from “Advance” to “Preliminary”
Changed the term “Unlimited” to “Infinite”
Changed endurance from 500K cycles to 200K cycles
Device operation: Tolerance limit changed from +20% to +15% in
the
Features Section and Operating Range Table
Removed Icc1 values from the DC table for 25 ns and 35 ns
industrial grade
Changed VSWITCH(min) from 2.55V to 2.45V
Added temperature specifications to data retention - 20 years at
55°C
Updated Part Nomenclature Table and Ordering Information Table
*D 597004 TUP See ECN Removed VSWITCH(min) specification from AutoStore/Power Up RE-
CALL table
Changed tGLAX specification from 20 ns to 1 ns
Added tDELAY(max) specification of 70 μs in the Hardware STORE
Cycle table
Removed tHLBL specification
Changed tSS specification from 70 μs(min) to 70 μs(max)
Changed VCAP(max) from 57 μF to 120 μF
*E 696097 VKN See ECN Added footnote 7 related to HSB
Added footnote 8 related to INT pin
Changed tGLAX to tGHAX
Removed ABE bit from Interrupt register
*F 1349963 UHA/SFV See ECN Changed from Preliminary to Final
Added Note 5 regarding the W bit in the Flag register
Updated Ordering Information Table
*G 2483006 GVCH/PYRS 05/05/08 Changed tolerance from +15%, -10% to +20%, -10%
Changed Operating voltage range from 2.7V-3.45V to 2.7V-3.6V
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