CY24272
Document History Page
Document Title: CY24272 Rambus→ XDR™ Clock Generator with Zero SDA Hold Time
Document Number:
REV. | ECN NO. | Issue | Orig. of | Description of Change | |
Date | Change | ||||
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** | 1749003 | See ECN | KVM/AESA | New data sheet | |
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| No 8 or 15/2 multipliers or 133MHz * 4 option | |
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| Max frequency is 667MHz |
© Cypress Semiconductor Corporation, 2007. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical components in
Any Source Code (software and/or firmware) is owned by Cypress Semiconductor Corporation (Cypress) and is protected by and subject to worldwide patent protection (United States and foreign), United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal,
Disclaimer: CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Cypress reserves the right to make changes without further notice to the materials described herein. Cypress does not assume any liability arising out of the application or use of any product or circuit described herein. Cypress does not authorize its products for use as critical components in
Use may be limited by and subject to the applicable Cypress software license agreement.
Document Number: | Revised November 9, 2007 | Page 13 of 13 |
PSoC Designer™, Programmable
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