CY7C1141V18, CY7C1156V18
CY7C1143V18, CY7C1145V18
Write Cycle Descriptions
The write cycle descriptions of CY7C1141V18 and CY7C1143V18 follows. [2, 10]
| BWS0/ | BWS1/ | K |
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| NWS0 |
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| L |
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| – | During the data portion of a write sequence: |
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| CY7C1141V18 − both nibbles (D[7:0]) are written into the device. |
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| CY7C1143V18 − both bytes (D[17:0]) are written into the device. |
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| CY7C1141V18 − both nibbles (D[7:0]) are written into the device. |
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| CY7C1143V18 − both bytes (D[17:0]) are written into the device. |
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| – | During the data portion of a write sequence: |
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| CY7C1141V18 − only the lower nibble (D[3:0]) is written into the device, D[7:4] | remains unaltered. | |
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| CY7C1143V18 − only the lower byte (D[8:0]) is written into the device, D[17:9] | remains unaltered. | |
| L |
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| CY7C1141V18 − only the lower nibble (D[3:0]) is written into the device, D[7:4] | remains unaltered. | |
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| CY7C1143V18 − only the lower byte (D[8:0]) is written into the device, D[17:9] | remains unaltered. | |
| H |
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| CY7C1141V18 − only the upper nibble (D[7:4]) is written into the device, D[3:0] remains unaltered. | ||
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| CY7C1143V18 − only the upper byte (D[17:9]) is written into the device, D[8:0] |
| remains unaltered. |
| H |
| L | – |
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| CY7C1141V18 − only the upper nibble (D[7:4]) is written into the device, D[3:0] remains unaltered. | ||
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| CY7C1143V18 − only the upper byte (D[17:9]) is written into the device, D[8:0] |
| remains unaltered. |
| H |
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| – | No data is written into the devices during this portion of a write operation. |
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| H |
| H | – |
| No data is written into the devices during this portion of a write operation. |
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The write cycle descriptions of CY7C1156V18 follows.[2, 10] |
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| BWS | 0 |
| K |
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| L |
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| During the data portion of a write sequence, the single byte (D[8:0]) is written into the device. | ||||||||
| L |
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| During the data portion of a write sequence, the single byte (D[8:0]) is written into the device. | |||||||||
| H |
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| No data is written into the device during this portion of a write operation. |
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| H |
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| No data is written into the device during this portion of a write operation. |
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Note
10.Is based on a Write cycle was initiated in accordance with the Write Cycle Description Truth Table. Alter NWS0, NWS1, BWS0, BWS1, BWS2, and BWS3 on different portions of a Write cycle, as long as the setup and hold requirements are achieved.
Document Number: | Page 11 of 28 |
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