CY7C1316JV18, CY7C1916JV18
CY7C1318JV18, CY7C1320JV18
Capacitance
Tested initially and after any design or process change that may affect these parameters.
Parameter | Description | Test Conditions | Max | Unit |
CIN | Input Capacitance | TA = 25°C, f = 1 MHz, VDD = 1.8V, VDDQ = 1.5V | 5 | pF |
CCLK | Clock Input Capacitance |
| 6 | pF |
CO | Output Capacitance |
| 7 | pF |
Thermal Resistance
Tested initially and after any design or process change that may affect these parameters.
Parameter | Description | Test Conditions | 165 FBGA | Unit | |
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ΘJA | Thermal Resistance | Test conditions follow standard test methods and | 28.51 | °C/W | |
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ΘJC | Thermal Resistance | 5.91 | °C/W | ||
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AC Test Loads and Waveforms
VREF = 0.75V
VREF |
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ZQ
RQ =
250Ω
(a)
RL = 50Ω
VREF = 0.75V
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VREF |
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OUTPUT |
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| ALL INPUT PULSES[19] | |||
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| 1.25V | ||||||
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| 5 pF 0.25V |
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Under | ZQ |
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| Slew Rate = 2 V/ns | |||
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Test |
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| RQ = |
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| 250Ω |
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INCLUDING |
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JIG AND |
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SCOPE |
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Notes
19.Unless otherwise noted, test conditions assume signal transition time of 2V/ns, timing reference levels of 0.75V, VREF = 0.75V, RQ = 250Ω, VDDQ = 1.5V, input pulse levels of 0.25V to 1.25V, and output loading of the specified IOL/IOH and load capacitance shown in (a) of AC Test Loads and Waveforms.
Document Number: | Page 21 of 26 |
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