Features
Configurations
CY7C1316CV18, CY7C1916CV18 CY7C1318CV18, CY7C1320CV18
Functional Description
Logic Block Diagram CY7C1316CV18
Logic Block Diagram CY7C1916CV18
CY7C1316CV18, CY7C1916CV18 CY7C1318CV18, CY7C1320CV18
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Logic Block Diagram CY7C1318CV18
Logic Block Diagram CY7C1320CV18
CY7C1316CV18, CY7C1916CV18 CY7C1318CV18, CY7C1320CV18
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165-Ball FBGA 13 x 15 x 1.4 mm Pinout
Pin Configuration
CY7C1316CV18, CY7C1916CV18 CY7C1318CV18, CY7C1320CV18
CY7C1316CV18, CY7C1916CV18 CY7C1318CV18, CY7C1320CV18
Pin Configuration continued
165-Ball FBGA 13 x 15 x 1.4 mm Pinout
CY7C1316CV18, CY7C1916CV18
CY7C1318CV18, CY7C1320CV18
Pin Definitions
Pin Definitions continued
CY7C1318CV18, CY7C1320CV18
CY7C1316CV18, CY7C1916CV18
Single Clock Mode
Functional Overview
Read Operations
Write Operations
Application Example
Echo Clocks
CY7C1316CV18, CY7C1916CV18 CY7C1318CV18, CY7C1320CV18
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Write Cycle Descriptions
Truth Table
Burst Address Table
CY7C1316CV18, CY7C1916CV18 CY7C1318CV18, CY7C1320CV18
Write Cycle Descriptions
CY7C1316CV18, CY7C1916CV18 CY7C1318CV18, CY7C1320CV18
Write Cycle Descriptions
Disabling the JTAG Feature
Test Access Port-Test Clock
Test Mode Select TMS
Performing a TAP Reset
IDCODE
SAMPLE Z
SAMPLE/PRELOAD
BYPASS
CY7C1316CV18, CY7C1916CV18 CY7C1318CV18, CY7C1320CV18
TAP Controller State Diagram
Page 14 of
TAP Electrical Characteristics
TAP Controller Block Diagram
CY7C1316CV18, CY7C1916CV18 CY7C1318CV18, CY7C1320CV18
TAP Timing and Test Conditions
TAP AC Switching Characteristics
CY7C1316CV18, CY7C1916CV18 CY7C1318CV18, CY7C1320CV18
Identification Register Definitions
Scan Register Sizes
Instruction Codes
CY7C1316CV18, CY7C1916CV18 CY7C1318CV18, CY7C1320CV18
Boundary Scan Order
CY7C1316CV18, CY7C1916CV18 CY7C1318CV18, CY7C1320CV18
Power Up Sequence in DDR-II SRAM
Power Up Sequence
DLL Constraints
CY7C1316CV18, CY7C1916CV18 CY7C1318CV18, CY7C1320CV18
Electrical Characteristics
DC Electrical Characteristics
Maximum Ratings
Operating Range
Electrical Characteristics continued
AC Electrical Characteristics
DC Electrical Characteristics
CY7C1316CV18, CY7C1916CV18 CY7C1318CV18, CY7C1320CV18
Capacitance
Thermal Resistance
CY7C1316CV18, CY7C1916CV18 CY7C1318CV18, CY7C1320CV18
Package
CY7C1316CV18, CY7C1916CV18 CY7C1318CV18, CY7C1320CV18
Switching Characteristics
Parameter
Switching Characteristics continued
CY7C1316CV18, CY7C1916CV18 CY7C1318CV18, CY7C1320CV18
Switching Waveforms
CY7C1316CV18, CY7C1916CV18 CY7C1318CV18, CY7C1320CV18
READ
tCQDOH
Ordering Information
CY7C1316CV18, CY7C1916CV18 CY7C1318CV18, CY7C1320CV18
Ordering Information continued
CY7C1316CV18, CY7C1916CV18 CY7C1318CV18, CY7C1320CV18
Package Diagram
CY7C1316CV18, CY7C1916CV18 CY7C1318CV18, CY7C1320CV18
Figure 6. 165-Ball FBGA 13 x 15 x 1.4 mm
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