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| CY7C1330AV25 |
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| PRELIMINARY | CY7C1332AV25 |
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Capacitance[17] |
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Parameter |
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| Max. | Unit |
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CIN |
| Input Capacitance |
| TA = 25°C, f = 1 MHz, |
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| VDD = 2.5V |
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CCLK |
| Clock Input Capacitance |
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| 6 |
| pF |
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| VDDQ = 1.5V |
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CI/O |
| Input/Output Capacitance |
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| 7 |
| pF |
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Thermal Resistance[17] |
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Parameter | Description |
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| BGA Typ. |
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ΘJA | Thermal Resistance |
| Still Air, soldered on a 4.25 x 1.125 inch, |
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| °C/W |
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| (Junction to Ambient) |
| circuit board |
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ΘJC | Thermal Resistance |
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| 6.0 |
| °C/W |
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| (Junction to Case) |
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AC Test Loads and Waveforms
VREF |
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| 0.75V |
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OUTPUT |
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| Z0 = 50Ω |
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Device |
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Under |
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Test |
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ZQ
RQ =
250Ω
(a)
RL = 50Ω
VREF = 0.75V
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| VREF = 0.75V |
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VREF |
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| 0.75V |
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OUTPUT |
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| ALL INPUT PULSES | ||||
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| 1.25V |
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Device |
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| 5 pF 0.25V |
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| 0.75V |
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Under | ZQ |
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| Slew Rate = 2 V/ns |
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Test |
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| RQ = |
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250Ω
(b)
Notes:
17.Tested initially and after any design or process change that may affect these parameters.
18.Unless otherwise noted, test conditions assume signal transition time of 2 V/ns, timing reference levels of 0.75V, VREF = 0.75V, RQ = 250Ω, VDDQ = 1.5V, input pulse levels of 0.25V to 1.25V, and output loading of the specified IOL/IOH and load capacitance shown in (a) of AC Test Loads.
Document No: | Page 14 of 19 |
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