Adv/Ld Bwx, Data, Out DQ, A6 A7 | Cypress CY7C1354C, CY7C1356C

CY7C1354C

CY7C1356C

Switching Waveforms

Read/Write Timing[23, 24, 25]

	1		2 t CYC	3
CLK
	tCENS	tCENH	tCH tCL
CEN
	tCES	tCEH
CE
ADV/LD
WE
BWX
ADDRESS	A1		A2
	tAS	tAH	tDS	tDH
	tAS	tAH
Data				D(A1)
-Out (DQ)				D(A1)
-Out (DQ)
OE

	4			5		6		7

A3	A4	A5
	tCO
	tCLZ	tDOH

D(A2) D(A2+1) Q(A3) Q(A4)

tOEHZ

8 9

A6 A7

tOEV tCHZ

Q(A4+1) D(A5)

tDOH tOELZ

10

Q(A6

WRITE	WRITE	BURST
D(A1)	D(A2)	WRITE
		D(A2+1)

READ	READ	BURST	WRITE	READ	WRITE
Q(A3)	Q(A4)	READ	D(A5)	Q(A6)	D(A7)
		Q(A4+1)

DESELECT

DON’T CARE

UNDEFINED

Notes:

23.For this waveform ZZ is tied low.

24.When CE is LOW, CE1 is LOW, CE2 is HIGH and CE3 is LOW. When CE is HIGH, CE1 is HIGH or CE2 is LOW or CE3 is HIGH.

25.Order of the Burst sequence is determined by the status of the MODE (0 = Linear, 1 = Interleaved). Burst operations are optional.

Document #: 38-05538 Rev. *G

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Cypress CY7C1354C, CY7C1356C manual Adv/Ld Bwx, Data, Out DQ, A6 A7, DON’T Care Undefined

Contents

Features Logic Block Diagram-CY7C1354C 256K xFunctional Description1 Cypress Semiconductor Corporation Logic Block Diagram-CY7C1356C 512K x Maximum Access Time Maximum Operating CurrentSelection Guide 250 MHz 200 MHz 166 MHz Unit Pin Configurations Pin Tqfp Pinout 512K × CY7C1356C 512K x Pin Configurations Ball BGA PinoutCY7C1354C 256K × Pin Configurations Ball Fbga Pinout CY7C1356C 512K × Pin Definitions Single Read Accesses Burst Read AccessesSingle Write Accesses Functional Overview ZZ Mode Electrical Characteristics Interleaved Burst Address Table Mode = Floating or VDDLinear Burst Address Table Mode = GND Sleep Mode Partial Write Cycle Description2, 3, 4Function CY7C1354C Function CY7C1356C Ieee 1149.1 Serial Boundary Scan Jtag TAP Controller Block DiagramTAP Controller State Diagram Bypass Register TAP Instruction Set TAP Timing Parameter Description Min Max Unit ClockOutput Times Set-up Times TAP DC Electrical Characteristics And Operating Conditions 3V TAP AC Test Conditions5V TAP AC Test Conditions Identification Register Definitions Scan Register Sizes Identification CodesRegister Name Bit Size Instruction Code Description Boundary Scan Exit Order 256K × Bit # Ball ID Boundary Scan Exit Order 512K × B10J10 K10 Electrical Characteristics Over the Operating Range14 Maximum RatingsOperating Range Ambient Range Capacitance16 Thermal ResistanceAC Test Loads and Waveforms 3V I/O Test Load Switching Characteristics Over the Operating Range 18 250 200 166 Parameter Description Unit Min Max ADV/LD BWX DataOut DQ A6 A7 Switching Waveforms NOP,STALL and Deselect Cycles23, 24 ZZ Mode Timing27 DON’T Care Ordering Information CY7C1354C CY7C1356C Package Diagrams Pin Thin Plastic Quad Flatpack 14 x 20 x 1.4 mm Ball BGA 14 x 22 x 2.4 mm 90±0.05 Soldernotespad Type NON-SOLDER Mask Defined Nsmd ECN No Issue Date Orig. Description of Change Document History