CY7C1355CCY7C1357C
Document #: 38-05539 Rev. *E Page 13 of 28

TAP Timing

TAP AC Switching Characteristics Over the Operating Range[10, 11]
Parameter Description Min. Max. Unit
Clock
tTCYC TCK Clock Cycle Time 50 ns
tTF TCK Clock Frequency 20 MHz
tTH TCK Clock HIGH Time 20 ns
tTL TCK Clock LOW Time 20 ns
Output Times
tTDOV TCK Clock LOW to TDO Valid 10 ns
tTDOX TCK Clock LOW to TDO Invalid 0 ns
Set-up Times
tTMSS TMS Set-Up to TCK Clock Rise 5 ns
tTDIS TDI Set-Up to TCK Clock Rise 5 ns
tCS Capture Set-Up to TCK Rise 5 ns
Hold Times
tTMSH TMS Hold after TCK Clock Rise 5 ns
tTDIH TDI Hold after Clock Rise 5 ns
tCH Capture Hold after Clock Rise 5 ns
Notes:
10.tCS and tCH refer to the set-up and hold time requirements of latching data from the boundary scan register.
11.Test conditions are specified using the load in TAP AC Test Conditions. tR/tF = 1 ns.
tTL
Test Clock
(TCK)
123456
T
est Mode Select
(TMS)
tTH
Test Data-Out
(TDO)
tCYC
Test Data-In
(TDI)
tTMSH
tTMSS
tTDIH
tTDIS
tTDOX
tTDOV
DON’T CARE UNDEFINED
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