CY7C1471BV25
CY7C1473BV25, CY7C1475BV25
Table 8. Identification Register Definitions
Instruction Field | CY7C1471BV25 | CY7C1473BV25 | CY7C1475BV25 | Description | |
(2MX36) | (4MX18) | (1MX72) | |||
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Revision Number (31:29) | 000 | 000 | 000 | Describes the version number | |
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Device Depth (28:24) | 01011 | 01011 | 01011 | Reserved for internal use | |
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Architecture/Memory Type(23:18) | 001001 | 001001 | 001001 | Defines memory type and architecture | |
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Bus Width/Density(17:12) | 100100 | 010100 | 110100 | Defines width and density | |
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Cypress JEDEC ID Code (11:1) | 00000110100 | 00000110100 | 00000110100 | Allows unique identification of SRAM | |
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| vendor | |
ID Register Presence Indicator (0) | 1 | 1 | 1 | Indicates the presence of an ID register | |
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Table 9. Scan Register Sizes
Register Name |
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| Bit Size (x36) | Bit Size (x18) |
| Bit Size (x72) | |
Instruction |
| 3 | 3 |
| 3 | ||
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Bypass |
| 1 | 1 |
| 1 | ||
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ID |
| 32 | 32 |
| 32 | ||
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Boundary Scan Order – 165FBGA |
| 71 | 52 |
| - | ||
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Boundary Scan Order – 209BGA |
| - | - |
| 110 | ||
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Table 10. Identification Codes |
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Instruction |
| Code |
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| Description |
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EXTEST |
| 000 |
| Captures IO ring contents. Places the boundary scan register between TDI and TDO. | |||
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| Forces all SRAM outputs to | |||
IDCODE |
| 001 |
| Loads the ID register with the vendor ID code and places the register between TDI | |||
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| and TDO. This operation does not affect SRAM operations. |
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SAMPLE Z |
| 010 |
| Captures IO ring contents. Places the boundary scan register between TDI and TDO. | |||
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| Forces all SRAM output drivers to a |
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RESERVED |
| 011 |
| Do Not Use: This instruction is reserved for future use. |
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SAMPLE/PRELOAD |
| 100 |
| Captures IO ring contents. Places the boundary scan register between TDI and TDO. | |||
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| Does not affect SRAM operation. This instruction does not implement 1149.1 preload | |||
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| function and is therefore not 1149.1 compliant. |
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RESERVED |
| 101 |
| Do Not Use: This instruction is reserved for future use. |
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RESERVED |
| 110 |
| Do Not Use: This instruction is reserved for future use. |
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BYPASS |
| 111 |
| Places the bypass register between TDI and TDO. This operation does not affect | |||
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| SRAM operation. |
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Document #: | Page 17 of 30 |
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