CY7C1470V33
CY7C1472V33
CY7C1474V33
Document #: 38-05289 Rev. *I Page 22 of 29
NOP, STALL and DESELECT Cycles[22, 23, 25]
ZZ Mode Timing[26, 27]
Notes:
25.The IGNORE CLOCK EDGE or STALL cycle (Clock 3) illustrated CEN being used to create a pause. A Write is not performed during this cycle.
26.Device must be deselected when entering ZZ mode. See cycle description table for all possible signal conditions to deselect the device.
27.I/Os are in High-Z when exiting ZZ sleep mode.
Switching Waveforms (continued)
READ
Q(A3)
45678910
CLK
CE
WE
CEN
BWx
ADV/LD
ADDRESS A3 A4 A5
D(A4)
Data
In-Out (DQ)
A1
Q(A5)
WRITE
D(A4) STALLWRITE
D(A1)
123
READ
Q(A2) STALL NOP READ
Q(A5) DESELECT CONTINUE
DESELECT
DON’T CARE UNDEFINED
t
CHZ
A2
D(A1) Q(A2) Q(A3)
tZZ
ISUPPLY
CLK
ZZ
tZZREC
A
LL INPUTS
(except ZZ)
DON’T CARE
IDDZZ
tZZI
tRZZI
Outputs (Q) High-Z
DESELECT or READ Only
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