CY7C6431xCY7C64345, CY7C6435x
Document Number: 001-12394 Rev *G Page 6 of 28

Pin Configuration

The enCoRe V USB device is available in a variety of packages which are listed and illustrated in the subsequent tables.
16-Pin Part Pinout
Figure 1. CY7C64315/CY7C64316 16-Pin enCoRe V Device
D+
QFN
(Top View)
P2[3]
P1[5]
P1[1]
Vss 16
15
14
13
P0[1]
P0[3]
P0[7]
P0[4]
5
6
7
8
Vdd
P1[0]
P1[7]
P1[4]
XRES
P2[5]
D–
1
2
3
4
12
11
10
9
Notes
1. During power up or reset event, device P1[0] and P1[1] may disturb the I2C bus. Use alternate pins if issues are encountered.
2. These are the in-system serial programming (ISSP) pins that are not High Z at power on reset (POR).
Table 1.16-Pin Part Pinout (QFN)
Pin No. Type Name Description
1I/O P2[3] Digital I/O, Crystal Input (Xin)
2IOHR P1[7] Digital I/O, SPI SS, I2C SCL
3IOHR P1[5] Digital I/O, SPI MISO, I2C SDA
4 IOHR P1[1](1, 2) Digital I/O, ISSP CLK, 12C SCL, SPI MOSI
5 Power Vss Ground connection
6 USB line D+ USB PHY
7 USB line D– USB PHY
8 Power Vdd Supply
9 IOHR P1[0](1, 2) Digital I/O, ISSP DATA, I2C SDA, SPI CLK
10 IOHR P1[4] Digital I/O, optional external clock input (EXTCLK)
11 Input XRES Active high external reset with internal pull down
12 IOH P0[4] Digital I/O
13 IOH P0[7] Digital I/O
14 IOH P0[3] Digital I/O
15 IOH P0[1] Digital I/O
16 I/O P2[5] Digital I/O, Crystal Output (Xout)
LEGEND I = Input, O = Output, OH = 5 mA High Output Drive, R = Regulated Output
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