CY7C6431x
CY7C64345, CY7C6435x
Pin Configuration
The enCoRe V USB device is available in a variety of packages which are listed and illustrated in the subsequent tables.
16-Pin Part Pinout
Figure 1. CY7C64315/CY7C64316 16-Pin enCoRe V Device
P2[3]
P1[7]
P1[5]
P1[1]
1
2
3 
4
P2[5] | P0[1] | P0[3] | P0[7] |
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16 | 15 | 14 | 13 | 12 |
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| QFN |
| 11 | |
| (Top View) | 10 | ||
5 6 7 8 | 9 | |||
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Vss | D+ | D– | Vdd |
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P0[4]
XRES
P1[4]
P1[0]
Table 1. 16-Pin Part Pinout (QFN)
Pin No. | Type | Name | Description |
1 | I/O | P2[3] | Digital I/O, Crystal Input (Xin) |
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2 | IOHR | P1[7] | Digital I/O, SPI SS, I2C SCL |
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3 | IOHR | P1[5] | Digital I/O, SPI MISO, I2C SDA |
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4 | IOHR | P1[1](1, 2) | Digital I/O, ISSP CLK, 12C SCL, SPI MOSI |
5 | Power | Vss | Ground connection |
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6 | USB line | D+ | USB PHY |
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7 | USB line | D– | USB PHY |
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8 | Power | Vdd | Supply |
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9 | IOHR | P1[0](1, 2) | Digital I/O, ISSP DATA, I2C SDA, SPI CLK |
10 | IOHR | P1[4] | Digital I/O, optional external clock input (EXTCLK) |
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11 | Input | XRES | Active high external reset with internal pull down |
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12 | IOH | P0[4] | Digital I/O |
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13 | IOH | P0[7] | Digital I/O |
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14 | IOH | P0[3] | Digital I/O |
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15 | IOH | P0[1] | Digital I/O |
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16 | I/O | P2[5] | Digital I/O, Crystal Output (Xout) |
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LEGEND I = Input, O = Output, OH = 5 mA High Output Drive, R = Regulated Output
Notes
1.During power up or reset event, device P1[0] and P1[1] may disturb the I2C bus. Use alternate pins if issues are encountered.
2.These are the
Document Number: | Page 6 of 28 |
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