Cypress STK17T88 Hardware Store Cycle, Soft Sequence Commands, Hardware Store to Sram Disabled

							STK17T88
Hardware STORE Cycle
NO.	Symbols		Parameter	STK17T88		Units		Notes
	Standard	Alternate		Min	Max
31	tDELAY	tHLQZ	Hardware STORE to SRAM Disabled	1	70	∝s		14
32	tHLHX		Hardware STORE Pulse Width	15		ns

Figure 11. Hardware STORE Cycle

32

23

31

Soft Sequence Commands

NO.	Symbols	Parameter	STK17T88		Units	Notes
	Standard		Min	Max
33	tSS	Soft Sequence Processing Time		70	∝s	15, 16
		Figure 12. Soft Sequence Command
		33			33

Notes

14.On a hardware STORE initiation, SRAM operation continues to be enabled for time tDELAY to allow read/write cycles to complete

15.This is the amount of time that it takes to take action on a soft sequence command. Vcc power must remain high to effectively register command.

16.Commands like Store and Recall lock out I/O until operation is complete which further increases this time. See specific command

Document Number: 001-52040 Rev. *A Page 10 of 22

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