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STK17T88
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STK17T88
Document Number: 001-52040 Rev. *A
Page 21 of 22
Package Diagram
Figure 16. 48-Pin SSOP (51-85061)
51-85061-*C
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Contents
Main
STK17T88
32K x 8 AutoStore nvSRAM with Real Time Clock
Features
Description
Logic Block Diagram
Document Number: 001-52040 Rev. *A Page 2 of 22
Pin Configurations
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Figure 1. 48-Pin SSOP
(TOP)
Note 1. For detailed package size specifications, see Package Diagram on page 21.
Absolute Maximum Ratings
RF (SSOP-48) Package Thermal Characteristics
DC Characteristics
AC Test Conditions
Capacitance
DC Characteristics
RTC DC Characteristics
SRAM READ Cycles #1 and #2
STK17T88
Document Number: 001-52040 Rev. *A Page 7 of 22
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SRAM WRITE Cycles #1 and #2
Figure 7. SRAM WRITE Cycle #1: W Controlled[7, 8]
STK17T88
AutoStore/Power Up RECALL
Software-Controlled STORE/RECALL Cycle
Document Number: 001-52040 Rev. *A Page 10 of 22
Hardware STORE Cycle
Soft Sequence Commands
31 tDELAY tHLQZ Hardware STORE to SRAM Disabled 1 70 s14 32 tHLHX Hardware STORE Pulse Width 15 ns
33 tSS Soft Sequence Processing Time 70 s 15, 16
MODE Selection
nvSRAM Operation
SRAM READ
SRAM WRITE
AutoStore Operation
Hardware STORE (HSB) Operation
Software STORE
Software RECALL
Data Protection
Noise Considerations
Preventing AutoStore
Real Time Clock
Reading the Clock
Setting the Clock
Backup Power
Stopping and Starting the RTC Oscillator
Interrupts
Interrupt Register
Flags Register
STK17T88
RTC Register Map
Page
Register Map Detail
Ordering Codes
Register Map Detail
Commercial and Industrial Ordering Information STK17T88 - R F 45 I TR
Page
Document History Page
Sales, Solutions, and Legal Information
Worldwide Sales and Design Support
Products
PSoC Solutions