All about graphics 19
The 16-bit graphics modes are organized differently. Most common are (R-G-B) 5-6-5 (e.g. XGA) and 6-6-4 (e.g. i860). 5-6-5 means that 5 bits are used for each of red and blue and 6 bits are used for green. In the case of 6-6-4, 6 bits are used for red and green and 4 bits for blue. Both ways of assigning the bits correspond to the color sensitivity of the human eye: this is highest for green and lowest for blue. 65,536 different colors can be displayed.
TrueColor
The TrueColor mode is more complex, using 24 bits per pixel. Here, 8 bits are available for each color component (256 levels), resulting in 16.7 million different color hues. There are more colors available than pixels on the screen (1.3 million pixels at a resolution of 1280 x 1024 ).
VESA DDC (Display Data Channel)
VESA DDC refers to a serial data channel between the monitor and the graphics board. Required for this is that both components support DDC and that the monitor cable includes the additional DDC line. An extended monitor cable is used so that the can send data about its technical specification, such as the name, model, maximum horizontal fre- quency, timing definitions etc. or receive commands from the graphics board.
There are various standards; DDC1, DDC2B, and DDC2AB.
DDC1
Only the monitor can send data (unidirectional). A line in the monitor cable is used to send a continuous data stream from the monitor to the graphics board. In the case of a standard IBM VGA compatible 15-pin monitor connector, pin 12 (formerly used as monitor ID bit 1) is used for data transmission, and the Vertical Sync signal of pin 14 is used as transmission clock (VCLK). An EDID data set (Extended Display Identification) of 128 bytes is sent repeatedly, from which the major monitor data can be read in the com- puter. The computer can then read the most important data, e.g. the monitor size, the extent of DPMS support and a list of the most important VESA monitor timings sup- ported, and some freely definable monitor timings.
DDC2B
The data channel is based on the I2C bus type with the access bus protocol and can be operated in both directions (bidirectionally between monitor and board). In the case of a standard IBM VGA compatible 15-pin monitor connector, pin 12 (formerly used as monitor ID bit 1) is used for data transmission (SDA), and the pin 15 (formerly used as monitor ID bit 3) is used as transmission clock (SCL). The graphics board can request the short EDID information (see DDC1) as well as the more comprehensive VDIF information (VESA Dis- play Identification File).
ELSA ERAZOR II and ELSA VICTORY Erazor LT
