Freescale Semiconductor DSP56366 2 Signal/Connection Descriptions

DSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4
Freescale Semiconductor 2-1
2 Signal/Connection Descriptions
2.1 S ignal Groupings
The input and output signals of the DSP56364 are organized into functional groups, which are listed in
Tabl e 2-1 and illustrated in Figure 2-1.
The DSP56364 is operated from a 3.3 V supply; however, some of the inputs can tolerate 5 V. A special
notice for this feature is added to the signal descriptions of those inputs.
Table2-1 DSP56364 Functional Signal Groupings
Functional Group Number of
Signals
Detailed
Description
Power ( VCC)20Tabl e 2-2
Ground (GND) 18 Tabl e 2-3
Clock and PLL 3 Tabl e 2-4
Address bus
Port A 1
1Port A is the external memory interface port, including the external address bus, data bus, and control signals.
18 Tabl e 2-5
Data bus 24 Tabl e 2-6
Bus control 10 Tabl e 2-7
Interrupt and mode control 5 Tabl e 2-8
HDI08 Port B2
2Port B signals are the GPIO port signals which are multiplexed with the HDI08 signals.
16 Tabl e 2-9
SHI 5Table 2-10
ESAI Port C3
3Port C signals are the GPIO port signals which are multiplexed with the ESAI signals.
12 Table 2-11
ESAI_1 Port E4
4Port E signals are the GPIO port signals which are multiplexed with the ESAI_1 signals.
6Table 2-12
Digital audio transmitter (DAX) Port D5
5Port D signals are the GPIO port signals which are multiplexed with the DAX signals.
2Table 2-13
Timer 1Table 2-14
JTAG/OnCE Port 4 Table 2-15