DSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4
Freescale Semiconductor 5-1
5 General Purpose Input/Output

5.1 Introduction

The DSP56362 provides up to 37 bidirectional signals that can be configured as GPIO signals or as
peripheral dedicated signals. No dedicated GPIO signals are provided. All of these signals are GPIO by
default after reset. The techniques for register programming for all GPIO functionality is very similar
between these interfaces. This section describes how signals may be used as GPIO.

5.2 P rogramming Model

The signals description section of this manual describes the special uses of these signals in detail. There
are five groups of these signals which can be controlled separately or as groups:
• Port B: up to 16 GPIO signals (shared with the HDI08 signals)
• Port C: 12 GPIO signals (shared with the ESAI signals)
• Port D: two GPIO signals (shared with the DAX signals)
• Port E: 10 GPIO signals (shared with the ESAI_1 signals)
• Timer: one GPIO signal (shared with the timer/event counter signal)

5.2.1 Port B Signals and Registers

When HDI08 is disabled, all 16 HDI08 signals can be used as GPIO. When HDI08 is enabled, five (HA8,
HA9, HCS, HOREQ, and HACK) of the 16 port B signals, if not used as a HDI08 signal, can be configured
as GPIO signals. The GPIO functionality of port B is controlled by three registers: host port control register
(HPCR), host port GPIO data register (HDR), and host port GPIO direction register (HDDR). These
registers are described in Section 6, "Host Interface (HDI08)" of this document.

5.2.2 Port C Signals and Registers

Each of the 12 port C signals not used as an ESAI signal can be configured individually as a GPIO signal.
The GPIO functionality of port C is controlled by three registers: port C control register (PCRC), port C
direction register (PRRC), and port C data register (PDRC). These registers are described in Section 8,
"Enhanced Serial AUDIO Interface (ESAI)".

5.2.3 Port D Signals and Registers

Each of the two Port D signals not used as a DAX signal can be configured individually as a GPIO signal.
The GPIO functionality of Port D is controlled by three registers: Port D control register (PCRD), Port D
direction register (PRRD) and Port D data register (PDRD). These registers are described in Section 10,
"Digital Audio Transmitter".