CHAPTER 3 OPERATING THE EMULATOR
Figure 3.2-2 Configuration of peripheral circuits for the clock circuit
FC SEL
X0 |
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| 1 |
| X0 |
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| 2 |
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X1 |
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| X1 | |
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| 3 |
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PA1/X0A |
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| PA1/X0A | |
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| 4 |
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PA2/X1A |
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| PA2/X1A | |
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| 5 |
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| MAIN XTAL |
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| 8 |
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Evaluation MCU | 1 |
| 6 |
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2 |
| 7 | 7 |
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| 3 |
| 6 | 8 |
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| 4 |
| 5 |
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| SUB XTAL | ||
| GND |
| GND |
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| X0A |
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| X1A |
| 390 KΩ |
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| 32.768 KHz |
| C | B | A | |
33 pF/50 V |
| 10 pF/50 V |
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| GND | GND |
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Figure 3.2-3 Examples of jumper settings for subclock selection
SUB XTAL | ||
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| X1A |
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| X0A |
A | B | C |
| (a) |
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SUB XTAL | ||
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| X1A |
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| X0A |
A | B | C |
| (b) |
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SUB XTAL
X1A
X0A
A B C
(c)
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