HP 9112 4.5Timer/Counter Operation

4.5Timer/Counter Operation

The PCI-9112 has an interval timer/counter 8254 on board. It offers 3 independent 16-bit programmable down counters; counter 1 and counter 2 are cascaded together for A/D timer pacer trigger of A/D conversion, and counter 0 is free for your applications. Figure 3.10 shows the 8254 timer/counter connection.

CN3 Pin-37				8254 Timer/Counter
	INT		EXT
			Counter 0
				CLK0
CN3 Pin-33				GATE0	OUT0	CN3 Pin-16
		Vcc
				Counter 1
CN3 Pin-34				CLK1
				GATE1	OUT1	A/D Trigger
2MHz						CN3 Pin-35
				Counter 2
Oscillator
				CLK2	OUT2
				GATE2

Figure 4.5 Block Diagram of 8254 Timer/Counter

The clock source of counter 0 can be internal or external, while the gate can be controlled externally and the output is send to the connector CN3. As to counter 0 and counter 1, the clock source is internally fixed, while the gate can be controlled externally and the output is send to the connector CN3 too. All the timer/ counter signals are TTL compatible.

The following shows how to configure the 8254 timer / counter chip.

The 8254 Timer / Counter Chip

The Intel (NEC) 8254 contains three independent, programmable, multimode 16 bit counter/timers. The three independent 16 bit counters can be clocked at rates from DC to 5 MHz. Each counter can be individually programmed with 6 different operating modes by appropriately formatted control words. The most commonly uses for the 8254 in microprocessor based system are:

Øprogrammable baud rate generator

Operation Theorem ∙ 35