Timer/Counter Operation | HP 9112 specs

4.5Timer/Counter Operation

The PCI-9112 has an interval timer/counter 8254 on board. It offers 3 independent 16-bit programmable down counters; counter 1 and counter 2 are cascaded together for A/D timer pacer trigger of A/D conversion, and counter 0 is free for your applications. Figure 3.10 shows the 8254 timer/counter connection.

CN3 Pin-37	8254 Timer/Counter
	EXT
	INT
	Counter 0
	CLK0
CN3 Pin-33	GATE0	OUT0	CN3 Pin-16
	Vcc
	Counter 1
CN3 Pin-34	CLK1
CN3 Pin-34	GATE1	OUT1	A/D Trigger
2MHz			CN3 Pin-35
2MHz	Counter 2
Oscillator	Counter 2
	CLK2	OUT2
	GATE2	OUT2

Figure 4.5 Block Diagram of 8254 Timer/Counter

The clock source of counter 0 can be internal or external, while the gate can be controlled externally and the output is send to the connector CN3. As to counter 0 and counter 1, the clock source is internally fixed, while the gate can be controlled externally and the output is send to the connector CN3 too. All the timer/ counter signals are TTL compatible.

The following shows how to configure the 8254 timer / counter chip.

The 8254 Timer / Counter Chip

The Intel (NEC) 8254 contains three independent, programmable, multi - mode 16 bit counter/timers. The three independent 16 bit counters can be clocked at rates from DC to 5 MHz. Each counter can be individually programmed with 6 different operating modes by appropriately formatted control words. The most commonly uses for the 8254 in microprocessor based system are:

Øprogrammable baud rate generator

Operation Theorem ∙ 35

Image 43

HP 9112 manual Timer/Counter Operation

Contents

Page Trademarks ALL Rights Reserved Detailed Company Information Adlink Technology IncQuestions Page Contents 9112DblBufferTransfer 9112GetOverrunStatus ConversionConversion Digital Input and Output 9112DO 9112DA 9112ADSetChannel 9112ADSetRange PCI Scan Utility Appendix A. Demo. Programs Product Warranty/ServiceWhat do you need VR Assignment Adjustment Software Utilities How to Use This Guide T r o d u c t i o n FeaturesIntroduction ∙ Analog Output D/A SpecificationsApplications Analog Input A/D Digital I/O DIO General SpecificationsProgrammable Counter Programming Library Software SupportingPCIS-LVIEW LabVIEW Driver PCIS-DDE DDE Server and InTouchTM PCIS-VEE HP-VEE DriverDAQBenchTM ActiveX Controls DASYLabTM PRO ∙ Installation InstallationWhat You Have Installation ∙ Device Installation for Windows SystemsUnpacking PCI -Bus Controller PCB LayoutPCI-9112 Layout Converter PCB Layout of the PCI-9112 CPCI-9112 Layout Analog Input Channel Configuration Jumper Settings10 ∙ Installation D/A Reference Voltage Setting Clock Source Setting 12 ∙ Installation Internal Reference Voltage Setting CN 3 Analog Input / Output & Counter/Timer Connectors Pin AssignmentsPin Assignments of PCI-9112 CN 2 Digital Signal Output do 0 CN 1 Digital Signal Input DI 014 ∙ Installation Pin Assignments of cPCI-9112 16 ∙ Installation Hardware Installation Outline Connect with ACLD-9182 Daughter Board ConnectionConnect with ACLD-8125 Connect with ACLD-9137 Connect with ACLD-9185 18 ∙ InstallationConnect with ACLD-9138 and ACLD-9188 I/O Registers Map G i s t e r s F o r m a tRegisters Format ∙ 20 ∙ Registers Format A/D Data Registers D/A Output Register Mode A/D control Register22 ∙ Registers Format MUX Register Bit8 ~ Bit5 Auto-Scan Bit 24 ∙ Registers Format Software Trigger Register A/D Status Register 26 ∙ Registers Format Digital I/O register High Level Programming Internal Timer/Counter RegisterLow Level Programming 28 ∙ Operation Theorem Analog Input Signal ConnectionE r a t i o n T h e o r e m A/D Conversion Differential input mode Single-ended ModeOperation Theorem ∙ 30 ∙ Operation Theorem 4 Floating source and differential input Software trigger 1 A/D Conversion ProcedureTimer Pacer Trigger 2 A/D Trigger Modes Interrupt Transfer Intx 3 A/D Data Transfer ModesExternal Trigger Software Data Transfer Drdy DMA Transfer Dmax D/A Conversion 34 ∙ Operation Theorem Digital Input and Output Counter Timer/Counter Operation 36 ∙ Operation Theorem General Purpose Timer/ CounterPacer Trigger Source Address Control Byte 38 ∙ Operation Theorem Mode Definitions + + L i b r a r y Libraries Installation++ Library ∙ 40 ∙ C/C++ Library Programming GuideNaming Convention Data Types Return Code 9112InitialSyntax Argument 42 ∙ C/C++ Library 9112DI9112DI Channel Description 9112DO 44 ∙ C/C++ Library 9112DA 9112ADSetChannel 46 ∙ C/C++ Library 9112ADSetRange Cardnumber the card number of PCI-9112 10 9112ADSetMode 48 ∙ C/C++ Library 11 9112ADSetAutoscan 12 9112ADSoftTrig 50 ∙ C/C++ Library 13 9112ADAquire 14 9112ADDMAStart 52 ∙ C/C++ Library 15 9112ADDMAStatus 54 ∙ C/C++ Library 16 9112ADDMAStop 17 9112ContDmaStart 56 ∙ C/C++ Library 18 9112CheckHalfReady 20 9112GetOverrunStatus 19 9112DblBufferTransfer 58 ∙ C/C++ Library 21 9112ContDmaStop 22 9112ADINTStart 60 ∙ C/C++ Library 23 9112ADINTStatus 24 9112ADINTStop 25 9112ADTimer 62 ∙ C/C++ Library 2MHz / c1 * c2 27 9112TIMERRead 26 9112TIMERStart 64 ∙ C/C++ Library 28 9112TIMERStop29 9112AllocDMAMem Argument cardnumber countervalue 32 9112GetSample 30 9112FreeDMAMem 66 ∙ C/C++ Library What do you need CalibrationCalibration ∙ Unipolar Calibration A/D AdjustmentVR Assignment Bipolar Calibration Reference Voltage Calibration D/A Adjustment2 D/A Channel Calibration Software Utility Software Utilities70 ∙ Software Utility Software Utility ∙ System ConfigurationRunning the Utility Calibration PCI Scan Utility Functional Testing72 ∙ Software Utility Appendix a Demo Programs ∙ P e n d i x a . D e m o O g r a m sDOS Software Windows 95 DLL 74 ∙ Appendix a Demo Programs Product Warranty/Service ∙ Product Warranty/Service