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HP 9112 Pacer Trigger Source, General Purpose Timer/ Counter, Address, 36 ∙ Operation Theorem

Models: 9112

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Øevent counter

Øbinary rate multiplier

Øreal-time clock

ØDigital one-shot

Ømotor control

For more information about the 8254, please refer to the NEC Microprocessors and peripherals or Intel Microsystems Components Handbook.

Pacer Trigger Source

The counter 1 and counter 2 are cascaded together to generate the timer pacer trigger of A/D conversion. The frequency of the pacer trigger is software controllable. The maximum pacer signal rate is 2MHz/4=500K which excess the maximum A/D conversion rate of the PCI-9112. The minimum signal rate is 2MHz/65536/65536, which is a very slow frequency that user may never use it.

General Purpose Timer/ Counter

The counter 0 is free for users' applications. The clock source, gate control signal and the output signal is send to the connector CN3. The general purpose timer / counter can be used as event counter, or used for measuring frequency, or others functions.

I/O Address

The 8254 in the PCI-9112 occupies 4 I/O address as shown below.

BASE + 0	LSB OR MSB OF COUNTER 0
BASE + 1	LSB OR MSB OF COUNTER 1
BASE + 2	LSB OR MSB OF COUNTER 2
BASE + 3	CONTROL BYTE

The programming of 8254 is control by the registers BASE+0 to BASE+3. The functionality of each register is specified this section. For more detailed information, please refer handbook of 8254 chip.

36 ∙ Operation Theorem

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HP 9112 manual Pacer Trigger Source, General Purpose Timer/ Counter, Address, 36 ∙ Operation Theorem

Contents

Page ALL Rights Reserved TrademarksQuestions Adlink Technology IncDetailed Company Information Page Contents Conversion Conversion Digital Input and Output9112DO 9112DA 9112ADSetChannel 9112ADSetRange 9112DblBufferTransfer 9112GetOverrunStatusAppendix A. Demo. Programs Product Warranty/Service What do you need VR Assignment AdjustmentSoftware Utilities PCI Scan UtilityHow to Use This Guide Introduction ∙ FeaturesT r o d u c t i o n Specifications ApplicationsAnalog Input A/D Analog Output D/AProgrammable Counter General SpecificationsDigital I/O DIO PCIS-LVIEW LabVIEW Driver Software SupportingProgramming Library PCIS-VEE HP-VEE Driver DAQBenchTM ActiveX ControlsDASYLabTM PRO PCIS-DDE DDE Server and InTouchTMWhat You Have Installation∙ Installation Unpacking Device Installation for Windows SystemsInstallation ∙ PCB Layout PCI-9112 LayoutConverter PCI -Bus ControllerCPCI-9112 Layout PCB Layout of the PCI-911210 ∙ Installation Jumper SettingsAnalog Input Channel Configuration Clock Source Setting D/A Reference Voltage SettingInternal Reference Voltage Setting 12 ∙ InstallationPin Assignments of PCI-9112 Connectors Pin AssignmentsCN 3 Analog Input / Output & Counter/Timer 14 ∙ Installation CN 1 Digital Signal Input DI 0CN 2 Digital Signal Output do 0 Pin Assignments of cPCI-9112 Hardware Installation Outline 16 ∙ InstallationDaughter Board Connection Connect with ACLD-8125Connect with ACLD-9137 Connect with ACLD-9182Connect with ACLD-9138 and ACLD-9188 18 ∙ InstallationConnect with ACLD-9185 Registers Format ∙ G i s t e r s F o r m a tI/O Registers Map A/D Data Registers 20 ∙ Registers FormatD/A Output Register 22 ∙ Registers Format A/D control RegisterMode Auto-Scan Bit MUX Register Bit8 ~ Bit524 ∙ Registers Format A/D Status Register Software Trigger RegisterDigital I/O register 26 ∙ Registers FormatLow Level Programming Internal Timer/Counter RegisterHigh Level Programming Analog Input Signal Connection E r a t i o n T h e o r e mA/D Conversion 28 ∙ Operation TheoremOperation Theorem ∙ Single-ended ModeDifferential input mode 4 Floating source and differential input 30 ∙ Operation Theorem1 A/D Conversion Procedure Timer Pacer Trigger2 A/D Trigger Modes Software trigger3 A/D Data Transfer Modes External TriggerSoftware Data Transfer Drdy Interrupt Transfer IntxD/A Conversion DMA Transfer DmaxDigital Input and Output 34 ∙ Operation TheoremTimer/Counter Operation CounterGeneral Purpose Timer/ Counter Pacer Trigger SourceAddress 36 ∙ Operation TheoremControl Byte Mode Definitions 38 ∙ Operation Theorem++ Library ∙ Libraries Installation+ + L i b r a r y Programming Guide Naming ConventionData Types 40 ∙ C/C++ Library9112Initial SyntaxArgument Return Code9112DI 9112DI ChannelDescription 42 ∙ C/C++ Library9112DO 9112DA 44 ∙ C/C++ Library9112ADSetChannel 9112ADSetRange 46 ∙ C/C++ Library10 9112ADSetMode Cardnumber the card number of PCI-911211 9112ADSetAutoscan 48 ∙ C/C++ Library12 9112ADSoftTrig 13 9112ADAquire 50 ∙ C/C++ Library14 9112ADDMAStart 52 ∙ C/C++ Library 15 9112ADDMAStatus 16 9112ADDMAStop 54 ∙ C/C++ Library17 9112ContDmaStart 18 9112CheckHalfReady 56 ∙ C/C++ Library19 9112DblBufferTransfer 20 9112GetOverrunStatus21 9112ContDmaStop 58 ∙ C/C++ Library22 9112ADINTStart 23 9112ADINTStatus 60 ∙ C/C++ Library25 9112ADTimer 24 9112ADINTStop2MHz / c1 * c2 62 ∙ C/C++ Library26 9112TIMERStart 27 9112TIMERRead28 9112TIMERStop 29 9112AllocDMAMemArgument cardnumber countervalue 64 ∙ C/C++ Library30 9112FreeDMAMem 32 9112GetSample66 ∙ C/C++ Library Calibration ∙ CalibrationWhat do you need A/D Adjustment VR AssignmentBipolar Calibration Unipolar Calibration2 D/A Channel Calibration D/A AdjustmentReference Voltage Calibration 70 ∙ Software Utility Software UtilitiesSoftware Utility System Configuration Running the UtilityCalibration Software Utility ∙72 ∙ Software Utility Functional TestingPCI Scan Utility P e n d i x a . D e m o O g r a m s DOS SoftwareWindows 95 DLL Appendix a Demo Programs ∙74 ∙ Appendix a Demo Programs Product Warranty/Service Product Warranty/Service ∙