Data Mode AT COMMANDS

Table 18. Data Mode Command Descriptions (Continued)

Command Default

Description

Synchronous Access Mode Configuration: controls the manner of operation of the Synchronous Access Mode in the DCE (if present).

Syntax:

+ESA=[<trans_idle>[,<framed_idle>[,<framed_un_ov>[,<hd_auto>[,<crc_type>[,<nrzi_en>[,<syn1>[,<sy n2>]]]]]]]]

<trans_idle> specifies the bit sequence transmitted by the DCE when a transmit data buffer underrun condition occurs, while operating in Transparent sub-Mode.

0In Transparent sub-Mode, DCE transmits 8-bit SYN sequence on idle. DCE receiver does not hunt for synchronization sequence

1In Transparent sub-Mode, DCE transmits 8-bit SYN sequence on idle. DCE receiver hunts for 8-bit SYN sequence

2In Transparent sub-Mode, DCE transmits 16-bit SYN sequence on idle. DCE receiver hunts for 16-bit SYN sequence

<framed_idle> specifies the bit sequence transmitted by the DCE when a transmit data buffer underrun condition occurs immediately after a flag, while operating in Framed sub-Mode.

0In Framed sub-Mode, DCE transmits HDLC flags on idle

1In Framed sub-Mode, DCE transmits marks (ones) on idle

<framed_un_ov> specifies the actions undertaken by the DCE when a transmit data buffer underrun or overrun condition occurs immediately after a non-flag octet, while operating in Framed sub?Mode.

0In Framed sub-Mode, DCE transmits abort on underrun in middle of frame

1In Framed sub-Mode, DCE transmits a flag on underrun in middle of frame, and notifies DTE of underrun or overrun

<hd_auto> specifies whether or not, in V.34 half duplex operation, additional procedures besides those 0, 0, 1, specified in clause 12/V.34 shall be performed by the DCE when switching from primary channel to

,0, 0, secondary channel operation, and vice versa.

0,

0

When switching between primary and secondary channel operation in V.34 half duplex, the

 

 

 

DCE only executes those procedures defined in clause 12/V.34

 

1

When switching between primary and secondary channel operation in V.34 half duplex, the

 

 

DCE executes additional procedures as described in 8.8.5 besides those defined in clause

 

 

12/V.34

 

<crc_type> specifies the CRC polynomial used while operating in Framed sub-Mode.

 

0

CRC generation and checking disabled

 

1

In Framed sub-Mode, the 16-bit CRC specified in 8.1.1.6/V.42 is generated by the DCE in

 

 

the transmit direction, and checked by the DCE in the receive direction

 

2

In Framed sub-Mode, the 32-bit CRC specified in 8.1.1.6/V.42 is generated by the DCE in

 

 

the transmit direction, and checked by the DCE in the receive direction

 

<nrzi_en> specifies if Non Return to Zero Inverted (NRZI) encoding is to be used by the DCE for transmit

 

and receive data.

 

0

NRZI encoding and decoding disabled

 

1

NRZI encoding enabled in the DCE in the transmit direction, and NRZI decoding enabled in

 

 

the DCE in the receive direction

 

<syn2> specifies the octet value(s) to be used while performing character-oriented framing.

 

0–255

When <trans_idle>=0, specifies the 8-bit transmit idle sequence to be used by the DCE.

 

 

When <trans_idle>=1, specifies the 8-bit synchronization sequence to be used by the DCE.

 

 

When <trans_idle>=2, specifies first 8 bits of 16-bit synchronization sequence to be used

 

 

by the DCE

 

<syn1> specifies the octet value(s) to be used while performing character-oriented framing.

 

0–255

When <trans_idle>=2, specifies last 8 bits of 16-bit synchronization sequence to be used

 

 

by the DCE

NOTE: An asterisk (*) denotes the factory-default setting.

536EX Chipset Developer’s Manual

49

Intel Confidential

Page 49
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Intel 537EX manual Secondary channel operation, and vice versa, 12/V.34, CRC generation and checking disabled, By the DCE

537EX specifications

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