Manuals / Intel / Computer Equipment / Computer Hardware

Intel Q35 Express SPI Removal / Installation Technique, 1394a Header, Pin Number, Definition

Models: Q35 Express Core 2 Duo

1 36

Download 36 pages 61.85 Kb

Page 23

Image 23

Development Kit Hardware Features—Intel Core 2 Duo Processor and Intel Q35 Express Chipset

Figure 13. Location for 1394a Header and USB Front Panel

U1FW

(USB Front

Panel)

J24LB

1394a

Header

Table 12. 1394a Header

Pin Number	Definition

1	NDCD A-

2	NSIN A

3	NSOUT A

4	NDTR A-

5	GND

6	NDSR A-

7	NRTS A-

8	NCTS A-

9	NRI A-

10	No Pin

2.9SPI Removal / Installation Technique

When removing or installing the SPI device, care must be taken to avoid damage to the SPI socket. The cap is constructed of plastic and can easily be damaged.

	Intel® CoreTM 2 Duo Processor and Intel ® Q35 Express Chipset Development Kit
October 2007	User’s Manual
Order Number: 318476001US	23

Page 23

Image 23

Intel Q35 Express SPI Removal / Installation Technique, Location for 1394a Header and USB Front Panel, Pin Number

Contents

October User’s ManualIntel CoreTM 2 Duo Processor and Intel Q35 Express Chipset Development KitOctober User’s ManualFigures ContentsIntel Core 2 Duo Processor and Intel Q35 Express Chipset-Contents TablesDescription Revision HistoryDate Revision1.0 About This Manual 1.1 Content OverviewChapter 2.0, “Development Kit Hardware Features” Chapter 3.0, “Setting Up and Configuring the Development Kit”Sheet 1 of 1.3 Glossary of Terms and AcronymsDefinition 1.4.2 Additional Technical Support 1.4 Support Options1.5 Product Literature 1.4.1 Electronic Support SystemsIntel Literature Centers 2.1 Intel Q35 Express Chipset Development Kit Overview 2.0 Development Kit Hardware FeaturesBoard Features 2.2 System Block DiagramTable 3. Development Kit Hardware Items 2.3 Development Kit Inventory ChecklistsFigure 2. Intel Q35 Express Chipset Development Kit block diagram Features/support Table 4. Development Kit Board SpecificationInternal I/O headers Supported Intel Technologies Sheet 1 ofSupported Intel Technologies Sheet 2 of Table 7. Additional Features2.4 Processor Support 2.5 System MemoryFigure 3. Memory Channel and DIMM Configuration 2.5.1 Dual Channel Interleaved Mode ConfigurationsFigure 5. Dual Channel Interleaved Mode Configuration with 3x DIMMs Figure 4. Dual Channel Interleaved Mode Configuration with 2x DIMMsFigure 7. Single Channel Asymmetric Mode Configuration with 1x DIMM 2.5.2 Single Channel Asymmetric Mode ConfigurationsFigure 6. Dual Channel Interleaved Mode Configuration with 4x DIMMs Figure 9. Back-panel Connectors 2.6 Back-Panel Connectors2.6.1 Audio-Connectors Figure 8. Single Channel Asymmetric Mode Configuration with 3x DIMMsLAN Connector LED status 2.6.2 RJ-45 LAN Connector with Integrated LEDs2.6.4 Coaxial S/PDIF In/Out Connector Figure 10. LAN Connector LED locations2.7.1 Extended Debug Probe XDP 2.7 Debug Features2.7.2 Power LEDs Figure 11. ITP-XDP Connector location J2BCFigure 12. Major Jumper and Header Locations 2.8 Development Kit Major Connectors and Jumpers2.7.4 Voltage Reference Voltage Reference detailTable 11. USB Front Panel 2.8.1 Jumper Functions2.8.2 USB 2.0 Front Panel 2.8.3 1394a HeaderPin Number 2.9 SPI Removal / Installation TechniqueFigure 13. Location for 1394a Header and USB Front Panel Table 12. 1394a HeaderFigure 14. SPI Socket with Retaining Clip 2.9.2 SPI Device Installation2.9.1 SPI Device Removal socket. Match pin 1. on the IC Figure 15. SPI Device Installation2. Close the cover 1. Place the fresh IC into theFigure 16. Intel Q35 Development Kits 3.0 Setting Up and Configuring the Development Kit3.2 Installing Board Standoffs 3.1 OverviewFigure 17. Mounting Hole Locations Figure 19. Casing with “Support and Retention Module” 3.3 BTX Heatsink Setup with SRM3.3.1 SRM Alignment on any BTX Board Figure 18. Mounting the Standoff for BTX HeatsinkFigure 21. Heatsink Alignment Figure 20. BTX board alignment on SRMFigure 22. Tightening Heatsink on the SRM and Board 3.4 Board Setup and Configuration before BootFigure 23. CPU Fan location Uncompressed INIT code checkpoints Figure 24. 2x12 Standard power supply and 2x2 power supply3.5 Post Codes Definitions 3.5.1 Normal Post CodesSet up floppy controller and data. Attempt to read from floppy Boot Block Recovery Code CheckpointsRuntime POST Code Checkpoints OEM memory detection/configuration error. Range reserved forof KB and MS Prepare runtime image for different BIOS modules. Initialize MS Order Number 318476001US User’s ManualOctober