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Intel Core 2 Duo, Q35 Express user manual User’s Manual, October, Order Number 318476001US

Models: Q35 Express Core 2 Duo

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Intel Core 2 Duo Processor and Intel Q35 Express Chipset—Setting Up and Configuring the Development Kit

Intel® CoreTM 2 Duo Processor and Intel ® Q35 Express Chipset Development Kit
User’s Manual	October 2007
36	Order Number: 318476001US

Page 36

Image 36

Intel Core 2 Duo, Q35 Express user manual User’s Manual, October, Order Number 318476001US

Contents

User’s Manual Intel CoreTM 2 Duo Processor and Intel Q35 Express ChipsetDevelopment Kit OctoberUser’s Manual OctoberContents FiguresTables Intel Core 2 Duo Processor and Intel Q35 Express Chipset-ContentsRevision History DateRevision Description1.1 Content Overview Chapter 2.0, “Development Kit Hardware Features”Chapter 3.0, “Setting Up and Configuring the Development Kit” 1.0 About This Manual1.3 Glossary of Terms and Acronyms DefinitionSheet 1 of 1.4 Support Options 1.5 Product Literature1.4.1 Electronic Support Systems 1.4.2 Additional Technical SupportIntel Literature Centers 2.0 Development Kit Hardware Features 2.1 Intel Q35 Express Chipset Development Kit Overview2.2 System Block Diagram Board Features2.3 Development Kit Inventory Checklists Figure 2. Intel Q35 Express Chipset Development Kit block diagramTable 3. Development Kit Hardware Items Table 4. Development Kit Board Specification Internal I/O headersSupported Intel Technologies Sheet 1 of Features/supportTable 7. Additional Features 2.4 Processor Support2.5 System Memory Supported Intel Technologies Sheet 2 of2.5.1 Dual Channel Interleaved Mode Configurations Figure 3. Memory Channel and DIMM ConfigurationFigure 4. Dual Channel Interleaved Mode Configuration with 2x DIMMs Figure 5. Dual Channel Interleaved Mode Configuration with 3x DIMMs2.5.2 Single Channel Asymmetric Mode Configurations Figure 6. Dual Channel Interleaved Mode Configuration with 4x DIMMsFigure 7. Single Channel Asymmetric Mode Configuration with 1x DIMM 2.6 Back-Panel Connectors 2.6.1 Audio-ConnectorsFigure 8. Single Channel Asymmetric Mode Configuration with 3x DIMMs Figure 9. Back-panel Connectors2.6.2 RJ-45 LAN Connector with Integrated LEDs 2.6.4 Coaxial S/PDIF In/Out ConnectorFigure 10. LAN Connector LED locations LAN Connector LED status2.7 Debug Features 2.7.2 Power LEDsFigure 11. ITP-XDP Connector location J2BC 2.7.1 Extended Debug Probe XDP2.8 Development Kit Major Connectors and Jumpers 2.7.4 Voltage ReferenceVoltage Reference detail Figure 12. Major Jumper and Header Locations2.8.1 Jumper Functions 2.8.2 USB 2.0 Front Panel2.8.3 1394a Header Table 11. USB Front Panel2.9 SPI Removal / Installation Technique Figure 13. Location for 1394a Header and USB Front PanelTable 12. 1394a Header Pin Number2.9.2 SPI Device Installation 2.9.1 SPI Device RemovalFigure 14. SPI Socket with Retaining Clip Figure 15. SPI Device Installation 2. Close the cover1. Place the fresh IC into the socket. Match pin 1. on the IC3.0 Setting Up and Configuring the Development Kit 3.2 Installing Board Standoffs3.1 Overview Figure 16. Intel Q35 Development KitsFigure 17. Mounting Hole Locations 3.3 BTX Heatsink Setup with SRM 3.3.1 SRM Alignment on any BTX BoardFigure 18. Mounting the Standoff for BTX Heatsink Figure 19. Casing with “Support and Retention Module”Figure 20. BTX board alignment on SRM Figure 21. Heatsink Alignment3.4 Board Setup and Configuration before Boot Figure 22. Tightening Heatsink on the SRM and BoardFigure 23. CPU Fan location Figure 24. 2x12 Standard power supply and 2x2 power supply 3.5 Post Codes Definitions3.5.1 Normal Post Codes Uncompressed INIT code checkpointsBoot Block Recovery Code Checkpoints Runtime POST Code CheckpointsOEM memory detection/configuration error. Range reserved for Set up floppy controller and data. Attempt to read from floppyof KB and MS Prepare runtime image for different BIOS modules. Initialize MS User’s Manual OctoberOrder Number 318476001US