Intel D925XBC, D925XCV Port 80h POST Codes, The POST card must be installed in PCI bus connector

Models: D925XBC D925XCV

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Error Messages and Beep Codes

4.2 Port 80h POST Codes

During the POST, the BIOS generates diagnostic progress codes (POST-codes) to I/O port 80h. If the POST fails, execution stops and the last POST code generated is left at port 80h. This code is useful for determining the point where an error occurred.

Displaying the POST-codes requires a PCI bus add-in card, often called a POST card. The POST card can decode the port and display the contents on a medium such as a seven-segment display.

NOTE

The POST card must be installed in PCI bus connector 1.

The tables below offer descriptions of the POST codes generated by the BIOS. Table 49 defines the uncompressed INIT code checkpoints, Table 50 describes the boot block recovery code checkpoints, and Table 51 lists the runtime code uncompressed in F000 shadow RAM. Some codes are repeated in the tables because that code applies to more than one operation.

Table 49. Uncompressed INIT Code Checkpoints

Code

Description of POST Operation

 

 

D0

NMI is Disabled. Onboard KBC, RTC enabled (if present). Init code Checksum verification

 

starting.

 

 

D1

Keyboard controller BAT test, CPU ID saved, and going to 4 GB flat mode.

 

 

D3

Do necessary chipset initialization, start memory refresh, and do memory sizing.

 

 

D4

Verify base memory.

 

 

D5

Init code to be copied to segment 0 and control to be transferred to segment 0.

 

 

D6

Control is in segment 0. To check recovery mode and verify main BIOS checksum. If either it is

 

recovery mode or main BIOS checksum is bad, go to check point E0 for recovery else go to check

 

point D7 for giving control to main BIOS.

 

 

D7

Find Main BIOS module in ROM image.

 

 

D8

Uncompress the main BIOS module.

 

 

D9

Copy main BIOS image to F000 shadow RAM and give control to main BIOS in F000

 

shadow RAM.

 

 

Table 50. Boot Block Recovery Code Checkpoints

Code

Description of POST Operation

 

 

E0

Onboard Floppy Controller (if any) is initialized. Compressed recovery code is uncompressed in

 

F000:0000 in Shadow RAM and give control to recovery code in F000 Shadow RAM. Initialize

 

interrupt vector tables, initialize system timer, initialize DMA controller and interrupt controller.

 

 

E8

Initialize extra (Intel Recovery) Module.

 

 

E9

Initialize floppy drive.

 

 

EA

Try to boot from floppy. If reading of boot sector is successful, give control to boot sector code.

 

 

EB

Booting from floppy failed, look for ATAPI (LS-120, Zip) devices.

 

 

EC

Try to boot from ATAPI. If reading of boot sector is successful, give control to boot sector code.

 

 

EF

Booting from floppy and ATAPI device failed. Give two beeps. Retry the booting procedure again

 

(go to check point E9).

 

 

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Intel D925XBC, D925XCV specifications Port 80h POST Codes, The POST card must be installed in PCI bus connector