Intel D925XCV specifications PCI Interrupt Routing Map, Not present on the D925XBC

Intel Desktop Board D925XCV/D925XBC Technical Product Specification

Table 16. PCI Interrupt Routing Map

			ICH6-R PIRQ Signal Name
PCI Interrupt Source
	PIRQA	PIRQB	PIRQC	PIRQD	PIRQE	PIRQF	PIRQG	PIRQH
IEEE-1394a controller		INTA
PCI bus connector 1					INTD	INTA	INTB	INTC
PCI bus connector 2					INTC	INTB	INTA	INTD
PCI bus connector 3 (Note)	INTD	INTC	INTA	INTB
PCI bus connector 4 (Note)			INTB	INTA		INTC	INTD

Note: Not present on the D925XBC.

✏NOTE

In PIC mode, the ICH6-R can connect each PIRQ line internally to one of the IRQ signals (3, 4, 5, 6, 7, 9, 10, 11, 12, 14, and 15). Typically, a device that does not share a PIRQ line will have a unique interrupt. However, in certain interrupt-constrained situations, it is possible for two or more of the PIRQ lines to be connected to the same IRQ signal. Refer to Table 15 for the allocation of PIRQ lines to IRQ signals in APIC mode.

PCI interrupt assignments to the USB ports, Serial ATA ports, and PCI Express ports are dynamic.

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