Intel D925XBC, D925XCV Intel 925X Chipset, 1.7.1 USB, IDE Support, Parallel ATE IDE Interface

Product Description

1.7 Intel® 925X Chipset

The Intel 925X chipset consists of the following devices:

•Intel 82925X Memory Controller Hub (MCH) with Direct Media Interface (DMI) interconnect

•Intel 82801FR I/O Controller Hub (ICH6-R) with DMI interconnect

•Firmware Hub (FWH)

The MCH is a centralized controller for the system bus, the memory bus, the PCI Express bus, and the DMI interconnect. The ICH6-R is a centralized controller for the board’s I/O paths. The FWH provides the nonvolatile storage of the BIOS.

For information about	Refer to
The Intel 925X chipset	http://developer.intel.com/
Resources used by the chipset	Chapter 2

1.7.1USB

The boards support up to eight USB 2.0 ports, supports UHCI and EHCI, and uses UHCI- and EHCI-compatible drivers.

The ICH6-R provides the USB controller for all ports. The port arrangement is as follows:

•Four ports are implemented with dual stacked back panel connectors adjacent to the audio connectors

•Four ports are routed to two separate front panel USB connectors

✏NOTES

•Computer systems that have an unshielded cable attached to a USB port may not meet FCC Class B requirements, even if no device is attached to the cable. Use shielded cable that meets the requirements for full-speed devices.

For information about	Refer to
The location of the USB connectors on the back panel	Figure 20, page 66
The location of the front panel USB connectors on the Desktop Board D925XCV	Figure 21, page 68
The location of the front panel USB connectors on the Desktop Board D925XBC	Figure 22, page 70

1.7.2IDE Support

The board provides five IDE interface connectors:

•One parallel ATA IDE connector, which supports two devices

•Four serial ATA IDE connectors, which support one device per connector

1.7.2.1Parallel ATE IDE Interface

The ICH6-R’s Parallel ATA IDE controller has one bus-mastering Parallel ATA IDE interface. The Parallel ATA IDE interface supports the following modes:

•Programmed I/O (PIO): processor controls data transfer.

•8237-style DMA: DMA offloads the processor, supporting transfer rates of up to 16 MB/sec.

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