Intel D925XCV Runtime Code Uncompressed in F000 Shadow RAM, Description of POST Operation

Models: D925XBC D925XCV

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Intel Desktop Board D925XCV/D925XBC Technical Product Specification

Table 51. Runtime Code Uncompressed in F000 Shadow RAM

Code

Description of POST Operation

 

 

03

NMI is Disabled. To check soft reset/power-on.

 

 

05

BIOS stack set. Going to disable cache if any.

 

 

06

POST code to be uncompressed.

 

 

07

CPU init and CPU data area init to be done.

 

 

08

CMOS checksum calculation to be done next.

 

 

0B

Any initialization before keyboard BAT to be done next.

 

 

0C

KB controller I/B free. To issue the BAT command to keyboard controller.

 

 

0E

Any initialization after KB controller BAT to be done next.

 

 

0F

Keyboard command byte to be written.

 

 

10

Going to issue Pin-23,24 blocking/unblocking command.

 

 

11

Going to check pressing of <INS>, <END> key during power-on.

 

 

12

To init CMOS if "Init CMOS in every boot" is set or <END> key is pressed. Going to disable DMA

 

and Interrupt controllers.

 

 

13

Video display is disabled and port-B is initialized. Chipset init about to begin.

 

 

14

8254 timer test about to start.

 

 

19

About to start memory refresh test.

 

 

1A

Memory Refresh line is toggling. Going to check 15 µs ON/OFF time.

 

 

23

To read 8042 input port and disable Megakey GreenPC feature. Make BIOS code segment

 

writeable.

 

 

24

To do any setup before Int vector init.

 

 

25

Interrupt vector initialization to begin. To clear password if necessary.

 

 

27

Any initialization before setting video mode to be done.

 

 

28

Going for monochrome mode and color mode setting.

 

 

2A

Different buses init (system, static, output devices) to start if present. (See Section 4.3 for details

 

of different buses.)

 

 

2B

To give control for any setup required before optional video ROM check.

 

 

2C

To look for optional video ROM and give control.

 

 

2D

To give control to do any processing after video ROM returns control.

 

 

2E

If EGA/VGA not found then do display memory R/W test.

 

 

2F

EGA/VGA not found. Display memory R/W test about to begin.

 

 

30

Display memory R/W test passed. About to look for the retrace checking.

 

 

31

Display memory R/W test or retrace checking failed. To do alternate Display memory R/W test.

 

 

32

Alternate Display memory R/W test passed. To look for the alternate display retrace checking.

 

 

34

Video display checking over. Display mode to be set next.

 

 

37

Display mode set. Going to display the power-on message.

 

 

38

Different buses init (input, IPL, general devices) to start if present. (See Section 4.3 for details of

 

different buses.)

 

 

39

Display different buses initialization error messages. (See Section 4.3 for details of different

 

buses.)

 

 

3A

New cursor position read and saved. To display the Hit <DEL> message.

 

 

continued

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Page 106
Image 106
Intel D925XCV, D925XBC specifications Runtime Code Uncompressed in F000 Shadow RAM, Description of POST Operation