Intel Extensible Firmware Interface 6.2.1 DEVICE_IO.Mem(), .Io(), and .Pci()

Device I/O Protocol
Version 1.02 12/12/00 141
6.2.1 DEVICE_IO.Mem(), .Io(), and .Pci()
Summary
Enable a driver to access device registers in the appropriate memory or I/O space.
Prototype
typedef
EFI_STATUS
(EFIAPI *EFI_DEVICE_IO) (
IN struct EFI_DEVICE_IO_INTERFACE *This,
IN EFI_IO_WIDTH Width,
IN UINT64 Address,
IN UINTN Count,
IN OUT VOID *Buffer
);
Parameters
This A pointer to the EFI_DEVICE_IO_INTERFACE instance. Type
EFI_DEVICE_IO_INTERFACE is defined in Section 6.2.
Width Signifies the width of the I/O operations. Type EFI_IO_WIDTH is
defined in Section 6.2.
Address The base address of the I/O operations. The caller is responsible for
aligning the Address if required.
Count The number of I/O operations to perform. Bytes moved is Width size *
Count, starting at Address.
Buffer For read operations, the destination buffer to store the results. For write
operations, the source buffer to write data from.
Description
The DEVICE_IO.Mem(), .Io(), and .Pci() functions enable a driver to access device
registers in the appropriate memory or I/O space.
The I/O operations are carried out exactly as requested. The caller is responsible for any alignment
and I/O width issues which the bus, device, platform, or type of I/O might require. For example on
IA-32 platforms, width requests of IO_UINT64 do not work.
For Mem() and Io(), the address field is the bus relative address as seen by the device on the bus.
For Mem() and Io() the caller must align the starting address to be on a proper width boundary.
For Pci(), the address field is encoded as shown in Table 6-1. The caller must align the register
number being accessed to be on a proper width boundary.