Intel PT800DBZ, PT800DBP, VIA 8237, VIA PT800 user manual Dram Timing Settings

Models: PT800DBZ VIA PT800 PT800DBP VIA 8237 PT800DB

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System BIOS Cacheable

Selecting Enabled allows caching of the system BIOS ROM at F0000h-FFFFFh, resulting in better system performance. However, if any program writes to this memory area, a system error may result. The settings are: Enabled and Disabled.

Video RAM Cacheable

Select Enabled allows caching of the video BIOS, resulting in better system performance. However, if any program writes to this memory area, a system error may result. The settings are: Enabled and Disabled.

Memory Hole

You can reserve this area of system memory for ISA adapter ROM. When this area is reserved, it cannot be cached. The user information of peripherals that need to use this area of system memory usually discusses their memory requirements. The settings are: Enabled and Disabled.

3-6-1

DRAM Timing Settings

 

 

 

 

CMOS Setup Utility – Copyright(C) 1984-2003 Award Software

 

 

 

 

DRAM Timing Settings

 

 

 

System Performance

 

 

 

 

 

Item Help

 

 

By SPD

 

 

RAS Active Time

 

 

7T

 

 

 

 

RAS Precharge Time

 

3T

 

 

 

RAS to CAS Delay

 

3T

 

Menu Level >>

 

DRAM CAS Latency

 

2.5

 

 

 

Bank Interleave

 

Enabled

 

 

 

DRAM Command Rate

 

2T Command

 

 

 

DRAM Burst Length

 

8

 

 

 

 

Write Recovery Time

 

2T

 

 

 

Write to Read Command Delay

3T

 

 

 

 

 

 

 

 

↑↓→← Move Enter:Select +/-/PU/PD:Value F10:Save

ESC:Exit F1:General Help

 

 

F5:Previous Values

F6:Optimized Defaults

F7:Standard Defaults

 

 

 

 

 

 

 

 

 

RAS Active Time

This field let’s you insert a timing delay between the CAS and RAS strobe signals, used when DRAM is written to, read from, or refreshed. Fast gives faster performance; and Slow gives more stable performance. This field applies only when synchronous DRAM is installed in the system. The settings are: 2T and 3T.

RAS Precharge Time

If an insufficient number of cycles is allowed for the RAS to accumulate its charge before DRAM refresh, the refresh may be incomplete and the DRAM may fail to retain date. Fast gives faster performance; and Slow gives more stable performance. This field applies only when synchronous DRAM is installed in the system. The settings are: 2T and 3T.

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Intel PT800DBZ, PT800DBP, VIA 8237, VIA PT800 user manual Dram Timing Settings