IQ80960RM/RN
Evaluation Board Manual 4-1
i960

®

RM/RN I/O Processor Overview
4

This chapter describes the features and operation of the processor on the IQ80960RM/RN

platform. For more detail, refer to the i960® RM/RN I/O Processor Developer’s Manual.

Figure 4-1. i960® RM /RN I/O Processor Block Diagram

80960 Core
Processor
Memory
Controller Bus
Interface
Unit
I2C Bus
Interface
Application
Accelerator
Internal
Arbitration
I2C Serial Bus
Local Memory
(SDRAM, Flash)
64-bit Internal Bus
One DMA
Channel
Address
Translation
Unit
64-bit/32-bit Seco ndary PCI Bus
PCI to PCI
Bridge
Messaging
Unit Two DM A
Channels
Address
Translation
Unit
64-bit/32-bit Prima ry PCI Bus
Performance
Monitoring
Unit
Secondary
PCI
Arbitration