Chapter 2: Installing the Hardware
Requirements for MVIP Bus Electrical Termination
For systems with five or fewer MVIP bus connections and less than 90 pF load on the clock lines, it is adequate to place the circuit board that is the master clock source at one end of the cable and electrically terminate the MVIP bus only on the circuit board located at the other end of the cable.
NOTE
The
source, because it is connected to the network. In this case, place the
cable.
On systems with more than five MVIP bus connections or more than 90 pF of load on the clock lines, both ends of the cable must be electrically terminated. No other boards should be electrically terminated.
If the
If you do not connect the
iSPAN PRI PCI ISDN Users Guide | 15 |