Chapter 3 Hardware Overview
© National Instruments Corporation 3-11 DIO 6533 User Manual
Table 3-1. 6533 Handshaking ProtocolsProtocol Peak Rates (MS/s)
at Various Cable
Lengths
REQ and ACK
Polarity REQ Edge
That Requests
Transfer
Programmable
Delay Location Complementary
Protocols
1 m 2 or 5 m
Asynchronous Protocols
8255
Emulation 52.67 Active-low Trailing Between
transfers Leading-Edge
Pulse
Level
ACK 3.33 2.5 Programmable Leading Before ACK
and between
transfers
Level ACK
Leading-
Edge Pulse 3.33 2.5 Programmable Leading Before ACK
and between
transfers
Leading-Edge
Pulse
Long Pulse 3.33 2.5 Programmable Leading For pulse width
and between
transfers
Long Pulse,
8255
Emula-tion,
PC-DIO-24,
PC-DIO-96/PnP,
8255, 82C55
Trailing-
Edge Pulse 1.8 1.5 Programmable Trailing For pulse width
and between
transfers
Trailing-Edge
Pulse
Synchronous Protocol
Burst 20 10* Programmable Neither
(level REQ) For clock speed Burst
* Although asynchronous modes can adjust automatically to cable length, for synchronous m odes, you must
select an appropriate speed for your cable at configuration time. Select a delay of at least the following: 0 for
a typical cable up to 1 m, 1 (100 ns) for a typical cable up to 5 m, and 2 (200 ns) for a typical cable up to 15 m
long.