Chapter 5 Signal Timing
DIO 6533 User Manual 5-30 © National Instruments Corporation
Figure 5-26. Burst Mode Output Timing (Default)
Parameter Description Minimum Maximum
Input Parameters
tpc PCLK cycle time 50 —
tpw PCLK high pulse duration 20 —
tpl PCLK low pulse duration 20 —
trs Setup time from REQ valid to PCLK falling
edge 1—
t
rh Hold time from PCLK to REQ invalid 0—
Output Parameters
tpa PCLK to ACK valid —22
t
ah Hold time from PCLK to ACK invalid 3—
t
pdo PCLK to output data valid —28
t
doh Hold time from PCLK to output data invalid 5—
All timing values are in nanoseconds.
PCLK
ACK
Data Out
REQ
trs
tpa
tpdo
tpw tpl
tpc
tdoh
trh
tah