Omega Engineering DAQ-12 user manual 4 D/A Converter 0 Register, 5 D/A Converter 1 Register

4.1.4D/A Converter 0 Register

An output to this register causes the lower twelve bits of data to be converted to an analog output on D/A converter channel 0. The four most significant bits of data are ignored. This register is 16-bit write only.

4.1.5D/A Converter 1 Register

An output to this register causes the lower twelve bits of data to be converted to an analog output on D/A converter channel 1. The four most significant bits of data are ignored. This register is 16-bit write only.

The remaining four registers are contained in an 8254 counter/timer.

4.1.6Clock Rate Register (low word)

The low word of the clock divider is contained in counter 0 of an 8254 counter/timer. The output of this counter is cascaded into the input of counter 1 to produce a 32-bit timer. Mode 2 must be selected for counter 0 with a minimum count of 2. This register is 8-bit read/write.

4.1.7Clock Rate Register (high word)

The high word of the clock divider is contained in counter 1 of the 8254 counter/timer. Mode 2 must be selected for counter 1 with a minimum count of 2. This register is 8-bit read/write.

4.1.8Multi-Function Timer Register

The multi-function timer is implemented using counter 2 of the 8254 counter/timer. Mode

2must be selected for this timer with a minimum count of 2. This register is 8-bit read/write.

4.1.98254 Control Word/Status Register

This register is used to program the mode and report the status of the 8254 counter/timer. This register is 8-bit read/write.

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