HighWire HW400c/2 User Reference Guide Rev 1.0
3.2 MV64462 System Controller.............................................................................................. 17
3.2.1 System Bus................................................................................................................ 17
3.2.2 Dual Data Rate (DDR) SDRAM............................................................................... 17
3.2.3 Host PCI Bus............................................................................................................. 18
3.2.3.1 Operation Without CompactPCI Bus..................................................................... 18
3.2.4 Local PCI Bus............................................................................................................18
3.2.5 Serial EEPROM.........................................................................................................19
3.2.6 MV64462 Ethernet Interface.....................................................................................22
3.2.7 MV64462 Device Interface....................................................................................... 22
3.2.7.1 SRAM Device ........................................................................................................22
3.2.7.2 Boot PROM............................................................................................................22
3.2.7.3 Disk-on-Chip.......................................................................................................... 22
3.2.7.4 CT Bus Controller.................................................................................................. 23
3.2.7.5 CPLD......................................................................................................................23
3.2.8 Watchdog Timer........................................................................................................23
3.2.9 Reset.......................................................................................................................... 23
3.2.10 Multi-Purpose Port (MPP) Usage............................................................................24
3.3 Computer Telephony Bus Controller..................................................................................25
3.3.1 H.110 Interface (T8110L)..........................................................................................25
3.3.2 T8110L Clocking Interface (T8110L).......................................................................25
3.3.3 Operation in Non-H.110 Backplane.......................................................................... 27
3.4 Layer 2 Ethernet Switch......................................................................................................27
3.4.1 Switch Registers Initialization and Monitoring.........................................................28
3.4.2 MV64462 System Controller Ethernet Interface.......................................................28
3.4.3 Front Panel (RJ-45) Ethernet Interface......................................................................28
3.4.4 PT5MC Ethernet Ports ..............................................................................................29
3.4.5 CompactPCI Packet Switch Backplane (cPSB) Ports............................................... 29
3.4.5.1 CompactPCI Connector J3, power and ground...................................................... 29
3.4.6 On-board Ethernet Indicator LEDs............................................................................30
3.5 Mezzanine Card Sites..........................................................................................................32
3.5.1 PT5MC Type Mezzanine Cards................................................................................ 32
3.5.2 PT2MC Type Mezzanine Cards................................................................................ 32
3.5.3 PMC Type Mezzanine Cards.....................................................................................32
3.5.4 Mezzanine Card Power..............................................................................................33
3.5.5 PTMC/PMC Connector Summary.............................................................................33
3.5.6 PTMC Jn1 and Jn2 PCI Connectors..........................................................................34
3.5.7 PTMC Jn3 CT Bus Connector...................................................................................35
3.5.8 PTMC Jn4 LAN/User I/O Connector........................................................................36
3.5.8.1 PTMC Site A Jn4....................................................................................................36
3.5.8.2 PTMC Site B Pn4................................................................................................... 38
3.5.9 PTMC Site Voltage Keying.......................................................................................39
3.6 IPMI System Management..................................................................................................39
3.6.1 IPMI Controller......................................................................................................... 39
3.6.2 Temperature and Voltage Monitor............................................................................ 40
3.6.3 Hot Swap Ejector Latch Detection............................................................................ 41
3.6.4 Blue (Hot Swap) LED Control.................................................................................. 41
3.6.5 Boot Status Monitor.................................................................................................. 41
3.6.6 Board Reset via IPMI................................................................................................ 42
October 10, 2006 Copyright 2006, SBE, Inc. Page vi