LAN9118 Family Programmer Reference Guide
Revision 1.0 (12-14-09) 30 SMSC AN 12.12
APPLICATION NOTE
Let’s take a look at Table6.2, "Transmit Packet Example", which shows a 78-byte (0x4e) transmit
packet used in the example, which begins at location 0xb4002013 in physical memory. In this case,
it happens to be an IP packet to be sent from our MAC source address of 00:80:0f:71:55:71 to a
destination MAC address of 00:0e:83:a0:de:ff.
In a PIO type transfer, 4-byte DWORD values are copied from memory to the device TX_DATA_FIFO,
so we begin building the TX_CMD_A command word by setting the Buffer End Alignment field to
0x0 to indicate 4-byte alignment:
Then, use the 2 low-bits from of the physical address (0x3) to set the 5-bit Data Start Offset field,
since we are only transferring 4 bytes at a time (PIO). Also we want to transfer the entire packet in
a single buffer transfer action, so First Segment and Last Segment flags are both set.
In the TX_CMD_B command word, we use a unique value of 0x1234 for the Packet Tag field, and an
overall Packet Length the same as the Buffer Size as the entire packet is transfer in a single action.
Note that the Buffer Size refers to the individual transfer payload, not counting the offset and padding
alignment, but in this simple case, length and size are the same.
Table6.2 Transmit Packet Example
PHYSICAL MEMORY
0XB4002000 0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x7 0x8 0x9 0xa 0xb 0xc 0xd 0xe 0xf
0x00
0x10 XX XX XX 00 0e 83 a0 de ff 00 80 0f 71 55 71 08
0x20 00 45 00 00 28 11 56 40 00 80 06 f0 6a aa 81 50
0x30 76 aa 81 53 96 04 e7 01 bd a9 4a 38 0d 0a d6 7c
0x40 6c 50 10 Ff ff f9 29 00 00 66 6f 72 53 4d 53 43
0x50 4d 2e 20 44 62 76 69 64 20 47 65 4c 62 6d 61 6e
0x60 21 YY YY YY
0x70
0x80
Table6.3 Buffer End Alignment
ALIGNMENT REQUIREMENT VALUE (25:24)
4-word alignment 0x0
16-word alignment 0x1
32-word alignment 0x2
(undefined, illegal) 0x3
TX_CMD_A
31 30 29 28 27 26 Buffer
End
Alignment
23 22 21 Data
Start
Offset
15 14 Fir st
Segment
Last
Segment
11 B uff er
Size
0x0 0x3 1 1 0x4e