LAN9118 Family Programmer Reference Guide
Revision 1.0 (12-14-09) 4 SMSC AN 12.12
APPLICATION NOTE
High-Performance host bus interface
Simple SRAM-like interface
Large, 16Kbyte FIFO memory with adjustable Tx/Rx allocation
Memory Alignment Technology (MAT) supports interleaved transmit/receive/command/status
access
One configurable Host interrupt
Burst read support
Comprehensive power management features
Numerous power management modes
Wake on LAN
“Packet-of-Interest” wakeup
Wakeup indicator event signal
Link Status Change
Miscellaneous features
Low profile 100-pin TQFP package
Single 3.3V power supply with 5V tolerant I/O
General Purpose Timer
Support for optional serial EEPROM
Supports for 3 LEDs/GPIO signals