Small Footprint RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support

Datasheet

„100M ADC (analog)

„100M PLL (analog)

„100M equalizer/BLW/clock recovery (DSP)

„10M SQUELCH (analog)

„10M PLL (analog)

„10M Transmitter (analog)

When enabled, auto-negotiation is started by the occurrence of one of the following events:

„Hardware reset

„Software reset

„Power-down reset

„Link status down

„Setting register 0, bit 9 high (auto-negotiation restart)

On detection of one of these events, the transceiver begins auto-negotiation by transmitting bursts of Fast Link Pulses (FLP). These are bursts of link pulses from the 10M transmitter. They are shaped as Normal Link Pulses and can pass uncorrupted down CAT-3 or CAT-5 cable. A Fast Link Pulse Burst consists of up to 33 pulses. The 17 odd-numbered pulses, which are always present, frame the FLP burst. The 16 even-numbered pulses, which may be present or absent, contain the data word being transmitted. Presence of a data pulse represents a “1”, while absence represents a “0”.

The data transmitted by an FLP burst is known as a “Link Code Word.” These are defined fully in IEEE

802.3clause 28. In summary, the transceiver advertises 802.3 compliance in its selector field (the first 5 bits of the Link Code Word). It advertises its technology ability according to the bits set in register 4 of the SMI registers.

There are 4 possible matches of the technology abilities. In the order of priority these are:

„100M Full Duplex (Highest priority)

„100M Half Duplex

„10M Full Duplex

„10M Half Duplex

If the full capabilities of the transceiver are advertised (100M, Full Duplex), and if the link partner is capable of 10M and 100M, then auto-negotiation selects 100M as the highest performance mode. If the link partner is capable of Half and Full duplex modes, then auto-negotiation selects Full Duplex as the highest performance operation.

Once a capability match has been determined, the link code words are repeated with the acknowledge bit set. Any difference in the main content of the link code words at this time will cause auto-negotiation to re-start. Auto-negotiation will also re-start if not all of the required FLP bursts are received.

The capabilities advertised during auto-negotiation by the transceiver are initially determined by the logic levels latched on the MODE[2:0] bus after reset completes. This bus can also be used to disable auto-negotiation on power-up.

Writing register 4 bits [8:5] allows software control of the capabilities advertised by the transceiver. Writing register 4 does not automatically re-start auto-negotiation. Register 0, bit 9 must be set before the new abilities will be advertised. Auto-negotiation can also be disabled via software by clearing register 0, bit 12.

The LAN8720/LAN8720i does not support “Next Page” capability.

Revision 1.0 (05-28-09)

30

SMSC LAN8720/LAN8720i

 

DATASHEET