Small Footprint RMII 10/100 Ethernet Transceiver with HP
Datasheet
3.1MAC Interface Signals
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| Table 3.2 RMII Signals |
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| SIGNAL |
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| NAME | PIN # | TYPE | DESCRIPTION |
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TXD0 | 17 | I8 | Transmit Data 0: The MAC transmits data to the PHY using this signal in |
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| all modes. |
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TXD1 | 18 | I8 | Transmit Data 1: The MAC transmits data to the PHY using this signal in |
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| all modes |
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TXEN | 16 | IPD | Transmit Enable: Indicates that valid data is presented on the TXD[1:0] |
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| signals, for transmission. |
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RXD0/ | 8 | IOPU | Receive Data 0: Bit 0 of the 4 data bits that are sent by the PHY in the |
MODE0 |
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| receive path. |
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| PHY Operating Mode Bit 0: set the default MODE of the PHY. |
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| See Section 5.3.9.2 for information on the MODE options. |
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RXD1/ | 7 | IOPU | Receive Data 1: Bit 1 of the 4 data bits that are sent by the PHY in the |
MODE1 |
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| receive path. |
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| PHY Operating Mode Bit 1: set the default MODE of the PHY. |
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| See Section 5.3.9.2 for information on the MODE options. |
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RXER/ | 10 | IOPD | Receive Error: Asserted to indicate that an error was detected somewhere |
PHYAD0 |
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| in the frame presently being transferred from the PHY. |
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| The RXER signal is optional in RMII Mode. |
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| This signal is mux’d with PHYAD0 |
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| See Section 5.3.9.1 for information on the ADDRESS options. |
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CRS_DV/ | 11 | IOPU | RMII Mode CRS_DV (Carrier Sense/Receive Data Valid) Asserted to |
MODE2 |
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| indicate when the receive medium is |
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| received, CRS_DV is asserted, but RXD[1:0] is held low until the SFD byte |
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| (10101011) is received. In 10BT, |
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| looped back onto the receive data pins, per the RMII standard. |
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| PHY Operating Mode Bit 2: set the default MODE of the PHY. |
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| See Section 5.3.9.2 for information on the MODE options. |
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3.2LED Signals
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| Table 3.3 LED Signals |
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SIGNAL |
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NAME | PIN # | TYPE | DESCRIPTION |
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LED1/ | 3 | IOPD | LED1 – Link activity LED Indication. |
REGOFF |
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| See Section 5.3.7 for a description of LED modes. |
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| Regulator Off: This pin may be used to configure the internal 1.2V regulator |
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| off. As described in Section 4.11, this pin is sampled during the |
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| sequence to determine if the internal regulator should turn on. When the |
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| regulator is disabled, external 1.2V must be supplied to VDDCR. |
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| When LED1/REGOFF is pulled high to VDD2A with an external resistor, the |
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| internal regulator is disabled. |
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| When LED1/REGOFF is floating or pulled low, the internal regulator is |
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| enabled (default). |
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SMSC LAN8720/LAN8720i | 15 | Revision 1.0 |
| DATASHEET |
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