Hi-Speed USB 2.0 to 10/100 Ethernet Controller

 

 

 

 

 

Datasheet

 

 

 

Table 2.1 MII Interface Pins (continued)

 

 

 

 

 

 

 

 

 

 

BUFFER

 

NUM PINS

NAME

SYMBOL

TYPE

DESCRIPTION

 

 

 

 

 

 

 

 

Transmit Data

TXD1

O8

Transmit Data 1: In external PHY mode, this pin

 

 

1

 

(PD)

functions as the transmit data 1 output to the

 

 

(External

 

 

external PHY.

 

 

PHY Mode)

 

 

 

 

 

General

GPIO5

IS/O8/

General Purpose I/O 5

 

 

Purpose I/O 5

 

OD8

 

 

 

(Internal PHY

 

(PU)

 

1

 

Mode Only)

 

 

 

 

 

Remote

RMT_WKP

IS

Remote Wakeup Configuration Strap: This

 

 

Wakeup

 

(PD)

strap configures the default descriptor values to

 

 

Configuration

 

 

support remote wakeup.

 

 

Strap

 

 

0 = Remote wakeup is not supported.

 

 

 

 

 

 

 

 

 

 

1 = Remote wakeup is supported.

 

 

 

 

 

See Note 2.1 for more information on

 

 

 

 

 

configuration straps.

 

 

 

 

 

 

 

 

Transmit Data

TXD0

O8

Transmit Data 0: In external PHY mode, this pin

 

 

0

 

(PD)

functions as the transmit data 0 output to the

 

 

(External

 

 

external PHY.

 

 

PHY Mode)

 

 

 

 

 

General

GPIO4

IS/O8/

General Purpose I/O 4

 

 

Purpose I/O 4

 

OD8

 

 

 

(Internal PHY

 

(PU)

 

 

 

Mode Only)

 

 

 

1

 

EEPROM

EEP_DISABLE

IS

EEPROM Disable Configuration Strap: This

 

 

Disable

 

(PD)

strap disables the autoloading of the EEPROM

 

 

Configuration

 

 

contents. The assertion of this strap does not

 

 

Strap

 

 

prevent register access to the EEPROM.

 

 

 

 

 

 

 

 

 

 

0 = EEPROM is recognized if present.

 

 

 

 

 

1 = EEPROM is not recognized even if it is

 

 

 

 

 

present.

 

 

 

 

 

See Note 2.1 for more information on

 

 

 

 

 

configuration straps.

 

 

 

 

 

 

 

 

Transmit

TXCLK

IS

Transmit Clock: In external PHY mode, this pin

1

 

Clock

 

(PU)

is the transmitter clock input from the external

 

(External

 

 

PHY. In internal PHY mode, this pin is not used.

 

 

 

 

 

 

PHY Mode)

 

 

 

 

 

 

 

 

 

Note 2.1 Configuration strap values are latched on power-on reset and system reset. Configuration straps are identified by an underlined symbol name. Signals that function as configuration straps must be augmented with an external resistor when connected to a load.

Revision 1.7 (10-02-08)

12

SMSC LAN9500/LAN9500i

 

DATASHEET