SMSC LAN9500, LAN9500i 4.5.5Turbo MII Interface Timing

Hi-Speed USB 2.0 to 10/100 Ethernet Controller

Datasheet

4.5.5Turbo MII Interface Timing

The external MII supports Turbo MII and the interface timing is as follows.

toutdlyttxhold

TXCLK

TXD[3:0]

TXEN

CRS

Figure 4.1 Turbo MII Output Timing

Table 4.12 Turbo MII Output Timing Values

SYMBOL	DESCRIPTION	MIN	MAX	UNITS	NOTES
toutdly	Clock to output delay for TXD and TXEN		12.5	ns	Note 4.12
					Note 4.13
ttxhold	TXD and TXEN hold time after TXCLK	1.5		ns	Note 4.13

Note 4.12 These values satisfy the MII specification requirement of 0 ns to 25 ns clock to output delay.

Note 4.13 Timing was designed for system load between 5 pf and 15 pf.

trxsetuptrxhold

RXCLK

RXD[3:0]

RXDV

CRS

Figure 4.2 Turbo MII Input Timing

SMSC LAN9500/LAN9500i	37	Revision 1.7 (10-02-08)
	DATASHEET