Hi-Speed USB 2.0 to 10/100 Ethernet Controller

Datasheet

Chapter 2 Pin Description and Configuration

TXEN

RXER

CRS/GPIO3

COL/GPIO0

TXCLK

VDD33IO

TEST1

VDD18CORE

VDD33IO

VDD33IO TXD3/GPIO7/EEP_SIZE TXD2/GPIO6/PORT_SWAP TXD1/GPIO5/RMT_WKP TXD0/GPIO4/EEP_DISABLE

RXDV

RXCLK

TDI/RXD3

TMS/RXD2

TCK/RXD1

TDO/nPHY RST

nTRST/RXD0

VDD33IO

PHY SEL

TEST3

EEDI

EEDO/AUTOMDIX EN

EECS

EECLK/PWR SEL

42

41

40

39

38

37

36

35

34

33

32

31

30

29

43

 

 

 

 

 

 

 

 

 

 

 

 

 

44

 

 

 

 

 

 

 

 

 

 

 

 

 

45

 

 

 

 

 

SMSC

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

46

 

 

 

LAN9500/LAN9500i

 

 

 

 

 

 

 

 

 

56 PIN QFN

 

 

 

 

 

47

(TOP VIEW)

 

48

 

49

VSS

50

51

52

53

54

55

56

1

2

3

4

5

6

7

8

9

10

11

12

13

14

nPHY INT

TXN

TXP

VDD33A

RXN

RXP

VDD33A

EXRES

VDD33A

VDD18PLL

USBDM

USBDP

TEST2

NC

28

nSPD_LED/GPIO10

27

nLNKA_LED/GPIO9

26

nFDX_LED/GPIO8

25

VDD33IO

24

nRESET

23

MDIO/GPIO1

22

MDC/GPIO2

21

VDD18CORE

20

VBUS_DET

19

XO

18

XI

17

VDD18USBPLL

16

USBRBIAS

15

VDD33A

NOTE: When HP Auto-MDIX is activated, the TXN/TXP pins can function as RXN/RXP and vice-versa

NOTE: Exposed pad (VSS) on bottom of package must be connected to ground

Figure 2.1 LAN9500/LAN9500i 56-QFN Pin Assignments (TOP VIEW)

SMSC LAN9500/LAN9500i

9

Revision 1.7 (10-02-08)

 

DATASHEET