SMSC LAN9500, LAN9500i 41

Hi-Speed USB 2.0 to 10/100 Ethernet Controller

Datasheet

Figure 5.2 LAN9500/LAN9500i 56-QFN Recommended PCB Land Pattern

SMSC LAN9500/LAN9500i	41	Revision 1.7 (10-02-08)
	DATASHEET

Contents

LAN9500/LAN9500i Hi-SpeedUSB 2.0 to 10/100 Ethernet Controller PRODUCT FEATURES DATASHEET DATASHEET Table of Contents List of Figures List Of Tables Chapter 1 Introduction 1.1Block Diagram 1.1.1Overview 1.1.2USB 1.1.3FIFO Controller 1.1.4Ethernet 1.1.5Power Management 1.1.6EEPROM Controller 1.1.7General Purpose I/O Chapter 2 Pin Description and Configuration LAN9500/LAN9500i 56 PIN QFN Page Page Page Page Page Page Page Page Page 2.1Buffer Types Chapter 3 EEPROM Controller (EPC) 3.1EEPROM Format Page 3.2EEPROM Defaults 3.3EEPROM Auto-Load 3.4An Example of EEPROM Format Interpretation Page Page Page Page Chapter 4 Operational Characteristics 4.1Absolute Maximum Ratings 4.2Operating Conditions 4.3Power Consumption 4.3.1SUSPEND0 4.3.2SUSPEND1 4.3.3SUSPEND2 4.3.4Operational Power Consumption 4.3.5Customer Evaluation Board Operational Power Consumption 4.4DC Specifications Page 4.5AC Specifications 4.5.1Equivalent Test Load 4.5.2Power-OnConfiguration Strap Valid Timing 4.5.3Reset and Configuration Strap Timing 4.5.4EEPROM Timing 4.5.5Turbo MII Interface Timing Page 4.6Clock Circuit Chapter 5 Package Outline Page Chapter 6 Revision History